Optimizing Power on nRF52 Designs

RE: Optimizing Power on nRF52 Designs

Thishon — Fri, 28 Mar 2025 12:59:30 GMT

I am using a custom designed board with NRF52832 Chipset with various interfaces connected like 2 SPI Channels and UART.
I need to optimize power consumption as it is battery powered device.
To test the deep sleep mode, I have used basic hello world logging code and then made it to sleep mode. When the RTT Viewer is not connected I am getting around 1.8mA and on connecting RTT I am getting around 4.1mA.
could Someone help me out to reduce power consumption during sleep mode. I have not configured any pins connected to the microcontroller. Do I have to make any changes to the pins and then put the device to sleep mode.

RE: Optimizing Power on nRF52 Designs

Nordic_Swapnil — Mon, 09 Dec 2024 06:49:01 GMT

Again Theory... Sir it would be really helpful if you could share example code or snipet , we are trying with given API sd_app_evt_wait(), _WFI, _WFE, SEV etc also off the QSPI flash , no serial prints no delay. please share resourse for System_ON Sleep

RE: Optimizing Power on nRF52 Designs

K.morita — Mon, 19 Feb 2024 05:44:15 GMT

Is the current value when the system is off 300 + 100 nA when activated in the NFC field of the nRF52832?
"nRF52832 Product Specification v1.9" states 700nA, which is correct?

RE: Optimizing Power on nRF52 Designs

binhla — Mon, 03 Oct 2022 03:07:22 GMT

This post explaint a lot and very useful.

The new NRF Connect SDK uses the Power Management of the Zephyr project.

Can you make another post that explain the Power Management of the Zephyr project and how to implement it on NRF52?

RE: Optimizing Power on nRF52 Designs

jhc — Mon, 21 Mar 2022 03:27:04 GMT

Hi, about item 8.b, it said the lowest power is 1.5uA for nRF52840 during the BLE connection event, it means sd_app_evt_wait works without RAM retention, right?

RE: Optimizing Power on nRF52 Designs

_alvaro_ — Fri, 24 Jul 2020 20:05:03 GMT

You mention "that single-pin GPIOTE interrupts may use more power than Port GPIOTE interrupts depending on the scenario."
Do you have any idea of the order of magnitude difference for these?
I'm seeing an extra ~10uA when I enable an interrupt on a pin and am trying to figure out if this is expected or not.

RE: Optimizing Power on nRF52 Designs

modles — Thu, 07 Feb 2019 21:56:52 GMT

Thanks, great post. Is there any way to disable SWD or DIF mode in software if the option of power cycling is unavailable (no access to device). ?

RE: Optimizing Power on nRF52 Designs

helloGodNodic — Thu, 28 Jun 2018 15:30:56 GMT

thanks!Simple and useful.

RE: Optimizing Power on nRF52 Designs

JohnMeg — Wed, 27 Jun 2018 17:39:51 GMT

Thank you, this is a good article. I ran into these requirements few months ago. Actually the main blocker I find out preventing me to go to SYSTEM_OFF mode is the easyDMA. If a peripheral is using the DMA you cannot go to System OFF. In my case it was related to the PWM.