Is Level trigger interrupt is available in nrf52 ?

[Ankush]

Hi ,

I am working on application in which I am using GPIO pin to detect interrupt. GPIO pin normally has logic low level. When it becomes high level I have to generate an interrupt to serve one application. After doing specific task for which interrupt has been generated , GPIO pin becomes low. I tried using GPIOTE_CONFIG_IN_SENSE_TOGGLE, GPIOTE_CONFIG_IN_SENSE_HITOLO and GPIOTE_CONFIG_IN_SENSE_LOTOHI, which are edge triggered interrupts.

But even with small false activity or noise the interrupt is getting generated. Can anyone help me to resolve this issue?

[RK]

No there's no level-triggered interrupts, so you need to debounce your signal. Either you do that in hardware, or you do it in software. The button source code does this, it uses a timer to debounce the buttons, you can use that code as an example. Or you can use PPI to disable the interrupt as soon as it fires (it takes a couple of channels to do this but is quite possible) so it doesn't fire again until you explicitly re-enable it.

[Emmanuel Blot]

Is there any example to use PPI (or whatever else) to enable use of level-triggered GPIO interrupt, not edge-triggered GPIO interrupt with a nRF52?

Thanks.

[run_ar]

As RK stated: "there's no level-triggered interrupts"

[Igor]

rk But there is a method called nrf_drv_saadc_limits_set(). What is wrong with it?

[AmbystomaLabs]

I don't think you would want to run the SAADC constantly to achieve this.

But, the comparator can easily provide the functionality you are looking for.  You can choose from a variety of internal references and it has a configurable hysteresis. When the comparison you configure is true the device generates a system event that is serviced just like any other interrupt.  The only downside is similar to SAADC you have to have the signal on one of the AIN pins. The COMP module is discussed in nRF product spec.

However, I do agree with the other comments here that you have some board level problem that you should solve.  Or, you have a software error that you are inferring to be a bounce problem.  FET's have a natural hysteresis that is rather large due to the gate threshold voltages required, so only some really bad pcb layout practices or power supply noise would cause it to trigger erroneously. It's also possible you are bringing in the signal from a separate device and in this case you haven't provided an adequate common ground.