JTAG Debug Specification for nRF24LE

[kaosad]

Hi Nordic team,

Do you publish the JTAG Debug specification for nRF24LE? I am interested in developing a low-cost debug probe for nRF24LE for SDCDB.

[Hung Bui]

The nRF24LE1 only support programming via SPI not JTAG. You can find the instruction on how to do flash programming via SPI at section 6.3.5 in the nRF24LE1 spec.

[kaosad]

I am interested in debugging and not programming. The nRF24L _Product_Specification_rev1_6 document mentioned that HW debugger support (section 27) is available. And the JTAG pins are (on 32-pin chip):

P1.3 => OCITO (out)

P1.2 => OCITDO (out)

P1.1 => OCITDI (in)

P1.0 => OCITMS (in)

P0.7 => OCITCK (in)

The document however lacks information on JTAG debugging. It would be useful if such information is available. I am sure many out there who want to be able to do hardware debugging.

[Hung Bui]

Hi kaosad,

I'm sorry I misread your question. You are correct you can use JTAG to debug the nRF24LE1. Unfortunately we can't provide the information on JTAG protocol due to legal restriction. Currently only 2 JTAG debugger are supported nRF24LE1 which are NRFProbe and FS2 from First Silicon Solution.

[kaosad]

My experience is hardware debugging offers better/faster troubleshooting during development. FS2 does not exist anymore. NRFProbe which comes with starter kit is too costly and has to be used with commercial Keil development tools. But, too bad. Otherwise such a cheap RF chip could have been more popular.

[Hung Bui]

Yes, it pretty unfortunate that JTAG is not an open protocol. On our newer chips (nRF5 series) SWD is more open.