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Do interrupts needs to be disabled before erasing / writing flash?

CurtisHx

The NVMC documentation states the CPU is halted while the NVMC is writing or erasing flash. If the CPU is halted, then interrupts shouldn't need to be disabled during flash operations, correct? I'm asking because other micros will halt the CPU during write / erase of flash, but recommend / require that interrupts are disabled.

Do interrupts need to be disabled before performing flash erase or write?

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    Ho Curtis

    No, yo don't need to disable interrupts. Since the CPU is halted the interrupts will be delayed anyway. They will fire once the flash operation is complete and the CPU execution commences.

    If you are running the SoftDevice, please be aware that it has it's own API for accessing flash, allowing you to do it without affecting the SoftDevice operation.

    Best regards
    Torbjørn

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