GPIOTE interrupt mapped on memory?

[Shorosky]

Hello: Im rewritting a program from ST32F105RC to NRF51822. In a part of the program of ST32, it checks if the interruption from pins 5-9 (EXTI9_5_IRQn) is enabled, and it does following:

check_variable = EXTI->IMR & EXTI9_5_IRQn;

EXTI->IMR give us the interruptions that are activated, and compares it with EXTI9_5_IRQn, that it is the interruption on 5-9 GPIO pins of the ST32.

When I set the interruption on NRF51822 I do that:

NVIC_DisableIRQ(GPIOTE_IRQn)

And the most similiar way to check if GPIOTE_IRQn interrupt is activated is by this instruction:

check_variable = (NVIC->ISER[0] & ((uint32_t) 1 << GPIOTE_IRQn));

Im checking it through NVIC, but I don't know if is it the correct way, or if there is any part of the memory where activated interruptions are mapped like on ST32.

Thank you.

[Susheel Nuguru]

When you enable interrupt for GPIOTE_IRQn you do something like this

NRF_GPIOTE->INTENSET = (1 << GPIOTE_INTENSET_PORT_Pos);
NVIC_EnableIRQ(GPIOTE_IRQn);

so when you check if it is really enabled then you need to check in NVIC and also in GPIOTE peipheral, for example PORT_EVENT

check_variable = ((NVIC->ISER[0] & ((uint32_t) 1 << GPIOTE_IRQn)) &&
                                 (NRF_GPIOTE->INTEN & (1 << GPIOTE_INTENSET_PORT_Pos));