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nRF5 SDK
v12.3.0
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| Choose documentation: | nRF5 SDK | S130 SoftDevice API | S132 SoftDevice API | S212 SoftDevice API | S332 SoftDevice API |
Macros | |
| #define | QSPI_ENABLED |
| Enable QSPI driver. More... | |
| #define | QSPI_CONFIG_SCK_DELAY |
| tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). More... | |
| #define | QSPI_CONFIG_READOC |
| Number of data lines and opcode used for reading. More... | |
| #define | QSPI_CONFIG_WRITEOC |
| Number of data lines and opcode used for writing. More... | |
| #define | QSPI_CONFIG_ADDRMODE |
| Addressing mode. More... | |
| #define | QSPI_CONFIG_MODE |
| SPI mode. More... | |
| #define | QSPI_CONFIG_FREQUENCY |
| Frequency divider. More... | |
| #define | QSPI_PIN_SCK |
| SCK pin value. More... | |
| #define | QSPI_PIN_CSN |
| CSN pin value. More... | |
| #define | QSPI_PIN_IO0 |
| IO0 pin value. More... | |
| #define | QSPI_PIN_IO1 |
| IO1 pin value. More... | |
| #define | QSPI_PIN_IO2 |
| IO2 pin value. More... | |
| #define | QSPI_PIN_IO3 |
| IO3 pin value. More... | |
| #define | QSPI_CONFIG_IRQ_PRIORITY |
| Interrupt priority. More... | |
| #define QSPI_CONFIG_ADDRMODE |
Addressing mode.
Following options are available:
| #define QSPI_CONFIG_FREQUENCY |
Frequency divider.
Following options are available:
| #define QSPI_CONFIG_IRQ_PRIORITY |
Interrupt priority.
Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
Following options are available:
| #define QSPI_CONFIG_MODE |
SPI mode.
Following options are available:
| #define QSPI_CONFIG_READOC |
Number of data lines and opcode used for reading.
Following options are available:
| #define QSPI_CONFIG_SCK_DELAY |
tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns).
Minimum value: 0 Maximum value: 255
| #define QSPI_CONFIG_WRITEOC |
Number of data lines and opcode used for writing.
Following options are available:
| #define QSPI_ENABLED |
Enable QSPI driver.
Set to 1 to activate.
| #define QSPI_PIN_CSN |
CSN pin value.
Minimum value: 0 Maximum value: 255
| #define QSPI_PIN_IO0 |
IO0 pin value.
Minimum value: 0 Maximum value: 255
| #define QSPI_PIN_IO1 |
IO1 pin value.
Minimum value: 0 Maximum value: 255
| #define QSPI_PIN_IO2 |
IO2 pin value.
Minimum value: 0 Maximum value: 255
| #define QSPI_PIN_IO3 |
IO3 pin value.
Minimum value: 0 Maximum value: 255
| #define QSPI_PIN_SCK |
SCK pin value.
Minimum value: 0 Maximum value: 255