Hello everyone,
I'm trying to add an external flash memory to the address range of the main memory. There is already an existing EEPROM, which will be deprecated later, and a Flash memory is added now. Both are connected via SPI. My intention is the following:
- Leave the EEPROM as it is for now in the configuration
- Add the flash memory to SPI
- Define an extended memory space (My intention is to start it at the address 0x90000)
- Create two partitions for the Flash:
- Config partition: This needs only be 100 kiB, replacing the functionality of the EEPROM, and will be directly addressed
- McuBoot swap partition: This will be where the image for the firmware update will be placed. This will be the rest of the memory.
Right now I always get the following warning when building and I'm not sure if I have configured everything correctly:
unit address and first address in 'reg' (0x200090000) don't match for /soc/spi@40004000/flash_at25pe80@2/partitions/partition@0 unit address and first address in 'reg' (0x200090400) don't match for /soc/spi@40004000/flash_at25pe80@2/partitions/partition@1
I have configured my application the following way:
CONFIG_SPI=y CONFIG_SPI_NOR=y CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096 CONFIG_PM_PARTITION_REGION_LITTLEFS_EXTERNAL=y CONFIG_PM_PARTITION_REGION_SETTINGS_STORAGE_EXTERNAL=y CONFIG_PM_PARTITION_REGION_NVS_STORAGE_EXTERNAL=y CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y CONFIG_PM_EXTERNAL_FLASH_MCUBOOT_SECONDARY=y
Device tree (SPI reg 1 is reserved for another device currently in development, but does not need a partition):
&spi1 {
compatible = "nordic,nrf-spi";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
cs-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>, <&gpio0 12 GPIO_ACTIVE_LOW>, <&gpio0 13 GPIO_ACTIVE_LOW>; //SIO_11 MCU_0403_A - SPI_CS1
eeprom_m95040:eeprom_m95040@0 {
// M95040 is compatible with atmel at25 eeprom driver
compatible = "atmel,at25";
reg = <0>;
size = <DT_SIZE_K(512)>;
pagesize = <512>;
address-width = <24>;
spi-max-frequency = <8000000>;
timeout = <5>;
};
flash_at25pe80:flash_at25pe80@2 {
compatible = "jedec,spi-nor";
status = "okay";
size = < DT_SIZE_M(8) >;
reg = < 2 >;
jedec-id = [1f 25 00];
spi-max-frequency = < 8000000 >;
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 0xc000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0xc000 0x32000>;
};
slot1_partition: partition@3e000 {
label = "image-1";
reg = <0x3e000 0x32000>;
};
scratch_partition: partition@70000 {
label = "image-scratch";
reg = <0x70000 0xa000>;
};
storage_partition: partition@7a000 {
label = "storage";
reg = <0x7a000 0x6000>;
};
};
};
&flash_at25pe80 {
partitions {
compatible = "fixed-partitions";
#address-cells = < 2 >;
#size-cells = < 1 >;
confflash: partition@0 {
label = "config";
reg = < 2 0x90000 0x400 >;
};
extflash: partition@1 {
label = "external-flash";
reg = < 2 0x90400 0xFFC00 >;
};
};
};
/{
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
zephyr,bt-mon-uart = &uart0;
zephyr,bt-c2h-uart = &uart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
nordic,pm-ext-flash = &extflash;
};
}
partition.yml
app:
address: 0x9200
end_address: 0x42000
region: flash_primary
size: 0x38e00 #App size 227.5 KB
mcuboot:
address: 0x0
end_address: 0x9000
placement:
before:
- mcuboot_primary
region: flash_primary
size: 0x9000 #38 KB MCU Bootloader
mcuboot_pad:
address: 0x9000
end_address: 0x9200
placement:
align:
start: 0x1000
before:
- mcuboot_primary_app
region: flash_primary
size: 0x200
mcuboot_primary:
address: 0x9000
end_address: 0x42000
orig_span: &id001
- mcuboot_pad
- app
region: flash_primary
sharers: 0x1
size: 0x39000
span: *id001
mcuboot_primary_app:
address: 0x9200
end_address: 0x42000
orig_span: &id002
- app
region: flash_primary
size: 0x38E00
span: *id002
mcuboot_secondary:
address: 0x90000
device: /soc/spi1/flash_at25pe80@2
end_address: 0x18FFF
region: external_flash
size: 0x100000 #1 MiB / 8 Mbit
nvs_storage:
address: 0x7b000
end_address: 0x80000
placement:
align:
start: 0x1000
before:
- end
region: flash_primary
size: 0x5000
sram_primary:
address: 0x20000000
end_address: 0x20020000
region: sram_primary
size: 0x20000
I have not defined any custom regions, as the documentation is (in my opinion) abysmal for this with too few examples. But I would gladly be proven otherwise.
The goal is for the config partition to be writable by address, and for McuBoot to use the second partition as an extension, although this may be implemented at a later time.
Sadly I have not found an example where multiple SPI devices are used, one of them a flash device and with addressable partitions, so I don't know where the warning is coming from, as it doesn't show what it expects from me.
Much thanks for any help,
Rico
