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How to configure RTT with a fixed address in IAR

Hello. I am using RTT successfully with nrf52 and IAR. But the start address for the RTT control block is a moving target: it changes whenever my code changes. I want to assign this block a specific memory section starting at 0x20000000 in ram and placing stack and heap thereafter. Therefore, I changed the SEGGER Real-time-Terminal control block (CB) initialization in SEGGER_RTT.c like this: Instead of the definition

SEGGER_RTT_CB _SEGGER_RTT;

that placed SEGGER_RTT on the stack, I define:

#pragma section = "RTT"
#define RTT_CONTROL_BLOCK_ADDRESS ((unsigned)__section_begin("RTT"))
#define _SEGGER_RTT (*((SEGGER_RTT_CB *) RTT_CONTROL_BLOCK_ADDRESS))

In the nrf52xxx_xxaa.icf configuration file, I added the following lines:

define symbol Size_RTT = 0x1000;
define block RTT       with alignment = 8, size = Size_RTT                  { };

define block FIXED_ORDER_RAM with fixed order { block RTT, block CSTACK, block HEAP };

and changed the place in directive

place in RAM_region   { readwrite, block CSTACK, block HEAP };

like so:

place in RAM_region   { readwrite,
                        first block FIXED_ORDER_RAM };

In the debugger, RTT_CONTROL_BLOCK_ADDRESS evaluates correctly to 0x20000000, but the J-Link Viewer does not find it. What am I doing wrong?

Thx in advance!

PS: The complete icf-file including my changes:

/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__   = 0x0007FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__   = 0x2000FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x2000;
define symbol __ICFEDIT_size_heap__   = 0x2000;
/**** End of ICF editor section. ###ICF###*/

define memory mem with size = 4G;
define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

define symbol Size_RTT = 0x1000;
define block RTT       with alignment = 8, size = Size_RTT                  { };

define block FIXED_ORDER_RAM with fixed order { block RTT, block CSTACK, block HEAP };

initialize by copy { readwrite };
do not initialize  { section .noinit };

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region   { readonly };
place in RAM_region   { readwrite,
                        first block FIXED_ORDER_RAM };
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