I am receiving characters on the UART of nRF52840. In my application I receive characters at 115 kbaud. As I must inspect each character I set the the receive buffer size to 1 so I receive an interrupt for each character received. I then set a flag of "interrupt pending" and put the work into the scheduler for a task to process the data. I do not need to flag every interrupt, as the task will read all the characters that have arrived in the fifo and processes.
However I am missing interrupts for some characters that arrive and I receive a uart error, and sometimes miss characters altogther, so my program fails when expecting specific data.
I am assuming that when using easy_dma, there is no fifo for the uart, rather characters are transferred to a memory buffer by dma, an interrupt is generated, and the data is moved from the memory buffer to the fifo buffer; the memory buffer is then set for the next character. This works if all interrupts occur as data is moved to the fifo. and my task will read.
What I really need is to set a memory buffer that is sufficiently large not to miss characters, and will generate an interrupt when data has arrived into the memory buffer and I can read all arrived characters.
This would be the behaviour of the UART, which has 6 deep hardware fifo, and would capture all the incoming characters and release them each time RX is read.
My question: Does the UARTE also use the hardware fifo to capture incoming characters that can be transferred to memory by DMA and interrupt generated for each character?
How do I use UART in place of UARTE, as all the code forces UARTE even if NRF_SERIAL_MODE_IRQ is selected,
#if defined(UARTE_PRESENT) && defined(UART_PRESENT)
drv_config.use_easy_dma = (p_config->mode == NRF_SERIAL_MODE_DMA);
#endif
Here is my configuration code. I increase IRQ to try to ensure I capture interrupts. I am assuming interrupts are disabled somewhere, but not sure where,
#define SERIAL1_FIFO_TX_SIZE 64
#define SERIAL1_FIFO_RX_SIZE 64
NRF_SERIAL_QUEUES_DEF(serial1_queues, SERIAL1_FIFO_TX_SIZE, SERIAL1_FIFO_RX_SIZE);
#define SERIAL1_BUFF_TX_SIZE 16
#define SERIAL1_BUFF_RX_SIZE 1
NRF_SERIAL_BUFFERS_DEF(serial1_buffs, SERIAL1_BUFF_TX_SIZE, SERIAL1_BUFF_RX_SIZE);
NRF_SERIAL_CONFIG_DEF(serial1_config, NRF_SERIAL_MODE_DMA,
&serial1_queues, &serial1_buffs, gprsUartEventHandler, NULL);
NRF_SERIAL_UART_DEF(serial1_uarte, 1);
#define GPRS_UART_CONFIG_IRQ_PRIORITY 2
I have some oscilloscope traces to show enter/exit of the interrupt routine and the task is this helps to understand the issue
