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  • Case ID: 324762
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Interfacing OLED SSD1306 with nRF52832 on Zephyr

Amank0623

Subject: Query: Interfacing OLED SSD1306 with nRF52832 on Zephyr

Dear Zephyr Dev Zone Community,

I hope this message finds you well. I am currently working on a project that involves interfacing an OLED SSD1306 display with an nRF52832 microcontroller using the Zephyr RTOS. I have encountered some challenges during the integration process and would greatly appreciate your assistance in resolving them.

Specifically, I am facing issues with initializing and communicating with the OLED SSD1306 display through the nRF52832 microcontroller. Despite following the documentation and examples available, I have been unable to achieve successful communication and display output.

Here are some key details about my setup and the issues I'm encountering:

  1. Hardware Setup:

    • OLED SSD1306 display (specify model/version if applicable)
    • nRF52832 microcontroller development board
    • Connections made using (I2C/SPI) interface
    • Power supply and wiring configurations

  2. Software Environment:

    • Zephyr RTOS version: [Specify version]
    • Development environment/tools used: [Specify IDE, SDK, etc.]
    • Relevant code snippets/configuration files: [Provide snippets of initialization code, device tree configuration, etc.]

  3. Issues Encountered:

    • Initialization problems: Difficulty initializing the OLED display driver.
    • Communication errors: Unable to establish communication between the microcontroller and the OLED display.
    • Display output: No output or incorrect display output observed on the OLED screen.

I would greatly appreciate any guidance, tips, or insights you can provide to help me overcome these challenges and successfully interface the OLED SSD1306 display with the nRF52832 microcontroller on the Zephyr RTOS.

Thank you very much for your time and assistance. I look forward to your valuable input and suggestions.

Best regards, Aman

Parents
  • 0

    Sorry for the late reply. I started to answer yesterday but somehow the answer was not posted. 

    I tested your application and got the following output on the display

    I also tested the LVGL sample from the Zephyr samples and got this output

    These seem to work both perfectly on the nRF52DK_nRF52832 built with -DSHIELD=ssd1306_128x64

    Kind regards,
    Øyvind

  • 0 in reply to Øyvind

    in your system its working fine but i am facing this issue with that

  • 0 in reply to Øyvind

    same pin that you are using and as i already mentioned in overlay, yes its nrf52dk_nrf52832dk

  • 0 in reply to Amank0623

    Please provide 

    build/zephyr/.config

    build/zephyr/zephyr.dts

  • 0 in reply to Øyvind

    could you explain how your oled is working with nrf52832 what files are you used for configuration

  • 0 in reply to Øyvind 

    
CONFIG_GPIO=y
CONFIG_LV_Z_VDB_SIZE=64
CONFIG_LV_Z_BITS_PER_PIXEL=1
# CONFIG_KSCAN is not set
# CONFIG_INPUT is not set
# CONFIG_WIFI is not set
# CONFIG_SPI is not set
CONFIG_GPIO_INIT_PRIORITY=40
CONFIG_LV_Z_DPI=148
# CONFIG_UHC_DRIVER is not set
# CONFIG_REGULATOR is not set
# CONFIG_SENSOR is not set
# CONFIG_WATCHDOG is not set
# CONFIG_MODEM is not set
# CONFIG_UART_INTERRUPT_DRIVEN is not set
CONFIG_DISPLAY=y
CONFIG_I2C=y
CONFIG_BOARD="nrf52dk_nrf52832"
CONFIG_SOC="nRF52832_QFAA"
CONFIG_SOC_SERIES="nrf52"
CONFIG_NUM_IRQS=39
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32768
CONFIG_CLOCK_CONTROL_INIT_PRIORITY=30
CONFIG_FLASH_SIZE=512
CONFIG_FLASH_BASE_ADDRESS=0x0
CONFIG_ICACHE_LINE_SIZE=32
CONFIG_DCACHE_LINE_SIZE=32
CONFIG_HEAP_MEM_POOL_SIZE=0
CONFIG_ROM_START_OFFSET=0
CONFIG_PINCTRL=y
CONFIG_CLOCK_CONTROL=y
# CONFIG_RESET is not set
CONFIG_SOC_HAS_TIMING_FUNCTIONS=y
CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT=y
CONFIG_PM=y
# CONFIG_PM_DEVICE is not set
CONFIG_NRF52_ANOMALY_132_WORKAROUND=y
CONFIG_LOG_DOMAIN_NAME=""
CONFIG_NRF_RTC_TIMER=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=32768
CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_SERIAL_INIT_PRIORITY=55
# CONFIG_FPU is not set
# CONFIG_MBEDTLS is not set
# CONFIG_MEMC is not set
# CONFIG_CODE_DATA_RELOCATION is not set
# CONFIG_CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS is not set
# CONFIG_TINYCRYPT is not set
CONFIG_SERIAL=y
CONFIG_MAIN_STACK_SIZE=2048
# CONFIG_SRAM_VECTOR_TABLE is not set
CONFIG_MP_MAX_NUM_CPUS=1
CONFIG_PLATFORM_SPECIFIC_INIT=y
CONFIG_HAS_DTS=y

#
# Devicetree Info
#
CONFIG_DT_HAS_ARDUINO_UNO_ADC_ENABLED=y
CONFIG_DT_HAS_ARDUINO_HEADER_R3_ENABLED=y
CONFIG_DT_HAS_ARM_ARMV7M_ITM_ENABLED=y
CONFIG_DT_HAS_ARM_CORTEX_M4F_ENABLED=y
CONFIG_DT_HAS_ARM_V7M_NVIC_ENABLED=y
CONFIG_DT_HAS_FIXED_PARTITIONS_ENABLED=y
CONFIG_DT_HAS_GPIO_KEYS_ENABLED=y
CONFIG_DT_HAS_GPIO_LEDS_ENABLED=y
CONFIG_DT_HAS_MMIO_SRAM_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_BPROT_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_CCM_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_CLOCK_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_ECB_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_EGU_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_FICR_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_GPIO_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_GPIOTE_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_GPREGRET_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_MWU_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_NFCT_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_PINCTRL_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_POWER_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_PPI_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_PWM_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_RADIO_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_RNG_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_SAADC_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_SPI_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_SWI_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_TEMP_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_TWI_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_UARTE_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_UICR_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF_WDT_ENABLED=y
CONFIG_DT_HAS_NORDIC_NRF52_FLASH_CONTROLLER_ENABLED=y
CONFIG_DT_HAS_PWM_LEDS_ENABLED=y
CONFIG_DT_HAS_SOC_NV_FLASH_ENABLED=y
CONFIG_DT_HAS_SOLOMON_SSD1306FB_ENABLED=y
CONFIG_DT_HAS_ZEPHYR_BT_HCI_ENTROPY_ENABLED=y
# end of Devicetree Info

#
# Modules
#

#
# Available modules.
#

#
# nrf (C:/ncs/v2.4.2/nrf)
#
CONFIG_NUM_METAIRQ_PRIORITIES=0
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=1024
CONFIG_LOG_BUFFER_SIZE=1024
# CONFIG_INIT_STACKS is not set

#
# Nordic nRF Connect
#
CONFIG_WARN_EXPERIMENTAL=y
CONFIG_PRIVILEGED_STACK_SIZE=1024
# CONFIG_ENTROPY_GENERATOR is not set
CONFIG_INIT_ARCH_HW_AT_BOOT=y
CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
# CONFIG_GETOPT is not set
# CONFIG_NCS_SAMPLES_DEFAULTS is not set

#
# Image build variants
#
# CONFIG_NCS_MCUBOOT_IN_BUILD is not set
# end of Image build variants

#
# Bootloader
#
# CONFIG_BUILD_S1_VARIANT is not set
# CONFIG_SECURE_BOOT is not set
CONFIG_PM_PARTITION_SIZE_PROVISION=0x1000
# CONFIG_B0_MIN_PARTITION_SIZE is not set
CONFIG_PM_PARTITION_SIZE_B0_IMAGE=0x7000
# CONFIG_SECURE_BOOT_CRYPTO is not set

#
# Secure Boot firmware validation
#
CONFIG_SB_VALIDATION_INFO_MAGIC=0x86518483
CONFIG_SB_VALIDATION_POINTER_MAGIC=0x6919b47e
CONFIG_SB_VALIDATION_INFO_CRYPTO_ID=1
CONFIG_SB_VALIDATION_INFO_VERSION=2
CONFIG_SB_VALIDATION_METADATA_OFFSET=0
CONFIG_SB_VALIDATE_FW_SIGNATURE=y
# end of Secure Boot firmware validation
# end of Bootloader

#
# Bluetooth Low Energy
#

#
# BLE over nRF RPC
#
# end of BLE over nRF RPC
# end of Bluetooth Low Energy

#
# DFU
#
# CONFIG_DFU_MULTI_IMAGE is not set
# CONFIG_DFU_TARGET is not set
# end of DFU

# CONFIG_ESB is not set
# CONFIG_ESB_LOG_LEVEL_OFF is not set
# CONFIG_ESB_LOG_LEVEL_ERR is not set
# CONFIG_ESB_LOG_LEVEL_WRN is not set
# CONFIG_ESB_LOG_LEVEL_INF is not set
# CONFIG_ESB_LOG_LEVEL_DBG is not set
CONFIG_ESB_LOG_LEVEL_DEFAULT=y
CONFIG_ESB_LOG_LEVEL=3

#
# Peripheral CPU DFU (PCD)
#
# CONFIG_PCD is not set
# CONFIG_PCD_APP is not set
# CONFIG_PCD_NET is not set
# end of Peripheral CPU DFU (PCD)

#
# Networking
#

#
# Application protocols
#

#
# nRF Cloud
#

#
# Client ID (nRF Cloud Device ID)
#
CONFIG_NRF_CLOUD_CLIENT_ID_SRC_COMPILE_TIME=y
CONFIG_NRF_CLOUD_CLIENT_ID="my-client-id"
# end of Client ID (nRF Cloud Device ID)

# CONFIG_NRF_CLOUD_MQTT is not set
# CONFIG_NRF_CLOUD_FOTA is not set
# CONFIG_NRF_CLOUD_FOTA_FULL_MODEM_UPDATE is not set
# CONFIG_NRF_CLOUD_REST is not set
# CONFIG_NRF_CLOUD_ALERT is not set
# CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_OFF is not set
# CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_ERR is not set
# CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_WRN is not set
# CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_INF is not set
# CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_DBG is not set
CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL_DEFAULT=y
CONFIG_NRF_CLOUD_ALERT_LOG_LEVEL=3
CONFIG_NRF_CLOUD_LOG_OUTPUT_LEVEL=1
CONFIG_NRF_CLOUD_LOG_BUF_SIZE=256
# CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_OFF is not set
# CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_ERR is not set
# CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_WRN is not set
# CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_INF is not set
# CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_DBG is not set
CONFIG_NRF_CLOUD_LOG_LOG_LEVEL_DEFAULT=y
CONFIG_NRF_CLOUD_LOG_LOG_LEVEL=3
# CONFIG_NRF_CLOUD_GATEWAY is not set
# CONFIG_NRF_CLOUD_LOG_LEVEL_OFF is not set
# CONFIG_NRF_CLOUD_LOG_LEVEL_ERR is not set
# CONFIG_NRF_CLOUD_LOG_LEVEL_WRN is not set
# CONFIG_NRF_CLOUD_LOG_LEVEL_INF is not set
# CONFIG_NRF_CLOUD_LOG_LEVEL_DBG is not set
CONFIG_NRF_CLOUD_LOG_LEVEL_DEFAULT=y
CONFIG_NRF_CLOUD_LOG_LEVEL=3
# end of nRF Cloud

# CONFIG_REST_CLIENT is not set
# CONFIG_DOWNLOAD_CLIENT is not set
# CONFIG_AWS_IOT is not set
# CONFIG_AWS_JOBS is not set
# CONFIG_AZURE_IOT_HUB is not set

#
# Self-Registration (Zi ZHu Ce)
#
# end of Self-Registration (Zi ZHu Ce)

# CONFIG_ICAL_PARSER is not set
# CONFIG_FTP_CLIENT is not set
# CONFIG_LWM2M_CLIENT_UTILS is not set
# CONFIG_WIFI_CREDENTIALS is not set
# CONFIG_WIFI_CREDENTIALS_STATIC is not set
# CONFIG_MQTT_HELPER is not set
# end of Application protocols
# end of Networking

#
# NFC
#
# CONFIG_NFC_NDEF is not set
# CONFIG_NFC_NDEF_PARSER is not set
# CONFIG_NFC_NDEF_PAYLOAD_TYPE_COMMON is not set
# CONFIG_NFC_T2T_PARSER is not set
# CONFIG_NFC_T4T_NDEF_FILE is not set
# CONFIG_NFC_T4T_ISODEP is not set
# CONFIG_NFC_T4T_APDU is not set
# CONFIG_NFC_T4T_CC_FILE is not set
# CONFIG_NFC_T4T_HL_PROCEDURE is not set
# CONFIG_NFC_PLATFORM is not set
# CONFIG_NFC_TNEP_TAG is not set
# CONFIG_NFC_TNEP_POLLER is not set
# CONFIG_NFC_TNEP_CH is not set
# end of NFC

# CONFIG_APP_EVENT_MANAGER is not set
# CONFIG_NRF_PROFILER is not set
# CONFIG_FW_INFO is not set

#
# Debug
#
# CONFIG_CPU_LOAD is not set
# CONFIG_PPI_TRACE is not set
# end of Debug

# CONFIG_MPSL_FEM_ONLY is not set
# CONFIG_MPSL_FEM_DEVICE_CONFIG_254 is not set
# CONFIG_MPSL_FEM_LOG_LEVEL_OFF is not set
# CONFIG_MPSL_FEM_LOG_LEVEL_ERR is not set
# CONFIG_MPSL_FEM_LOG_LEVEL_WRN is not set
# CONFIG_MPSL_FEM_LOG_LEVEL_INF is not set
# CONFIG_MPSL_FEM_LOG_LEVEL_DBG is not set
CONFIG_MPSL_FEM_LOG_LEVEL_DEFAULT=y
CONFIG_MPSL_FEM_LOG_LEVEL=3
CONFIG_MPSL_THREAD_COOP_PRIO=8
CONFIG_MPSL_WORK_STACK_SIZE=1024
CONFIG_MPSL_TIMESLOT_SESSION_COUNT=0
# CONFIG_MPSL_ASSERT_HANDLER is not set
# CONFIG_MPSL_LOG_LEVEL_OFF is not set
# CONFIG_MPSL_LOG_LEVEL_ERR is not set
# CONFIG_MPSL_LOG_LEVEL_WRN is not set
# CONFIG_MPSL_LOG_LEVEL_INF is not set
# CONFIG_MPSL_LOG_LEVEL_DBG is not set
CONFIG_MPSL_LOG_LEVEL_DEFAULT=y
CONFIG_MPSL_LOG_LEVEL=3

#
# Partition Manager
#
# CONFIG_PARTITION_MANAGER_ENABLED is not set
CONFIG_SRAM_SIZE=64
CONFIG_SRAM_BASE_ADDRESS=0x20000000

#
# Zephyr subsystem configurations
#
# end of Zephyr subsystem configurations

#
# NCS subsystem configurations
#
# CONFIG_PM_SINGLE_IMAGE is not set
CONFIG_PM_EXTERNAL_FLASH_BASE=0
# CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK is not set
CONFIG_PM_SRAM_BASE=0x20000000
CONFIG_PM_SRAM_SIZE=0x10000
# end of Partition Manager

#
# nRF RPC (Remote Procedure Call) library
#
# end of nRF RPC (Remote Procedure Call) library

#
# Full Modem Firmware Update Management(FMFU)
#
# CONFIG_MGMT_FMFU_LOG_LEVEL_OFF is not set
# CONFIG_MGMT_FMFU_LOG_LEVEL_ERR is not set
# CONFIG_MGMT_FMFU_LOG_LEVEL_WRN is not set
# CONFIG_MGMT_FMFU_LOG_LEVEL_INF is not set
# CONFIG_MGMT_FMFU_LOG_LEVEL_DBG is not set
CONFIG_MGMT_FMFU_LOG_LEVEL_DEFAULT=y
CONFIG_MGMT_FMFU_LOG_LEVEL=3
# end of Full Modem Firmware Update Management(FMFU)

# CONFIG_CAF is not set

#
# Nordic IEEE 802.15.4
#
# end of Nordic IEEE 802.15.4

# CONFIG_DM_MODULE is not set

#
# TF-M SPM component configs
#
CONFIG_TFM_CONN_HANDLE_MAX_NUM=8
# end of TF-M SPM component configs

#
# Libraries
#

#
# Binary libraries
#
# end of Binary libraries

# CONFIG_ADP536X is not set
# CONFIG_AT_MONITOR is not set
# CONFIG_LTE_LINK_CONTROL is not set
CONFIG_NRF_BPROT_FLASH_REGION_SIZE=0x1000
CONFIG_FPROTECT_BLOCK_SIZE=0x1000
# CONFIG_FPROTECT is not set
# CONFIG_AT_CMD_CUSTOM is not set
# CONFIG_DK_LIBRARY is not set
# CONFIG_MODEM_INFO is not set
CONFIG_RESET_ON_FATAL_ERROR=y
# CONFIG_FATAL_ERROR_LOG_LEVEL_OFF is not set
# CONFIG_FATAL_ERROR_LOG_LEVEL_ERR is not set
# CONFIG_FATAL_ERROR_LOG_LEVEL_WRN is not set
# CONFIG_FATAL_ERROR_LOG_LEVEL_INF is not set
# CONFIG_FATAL_ERROR_LOG_LEVEL_DBG is not set
CONFIG_FATAL_ERROR_LOG_LEVEL_DEFAULT=y
CONFIG_FATAL_ERROR_LOG_LEVEL=3
# CONFIG_SMS is not set
# CONFIG_SUPL_CLIENT_LIB is not set
# CONFIG_DATE_TIME is not set
# CONFIG_HW_ID_LIBRARY is not set
# CONFIG_WAVE_GEN_LIB is not set
CONFIG_HW_UNIQUE_KEY_PARTITION_SIZE=0
# CONFIG_MODEM_JWT is not set
# CONFIG_QOS is not set
# CONFIG_SFLOAT is not set
# CONFIG_CONTIN_ARRAY is not set
# CONFIG_PCM_MIX is not set
# CONFIG_TONE is not set
# CONFIG_PSCM is not set
# CONFIG_DATA_FIFO is not set
# CONFIG_FEM_AL_LIB is not set
# end of Libraries

#
# Device Drivers
#
# CONFIG_BT_DRIVER_QUIRK_NO_AUTO_DLE is not set
# CONFIG_ETH_RTT is not set
# CONFIG_NRF_SW_LPUART is not set
CONFIG_NRFX_GPIOTE_NUM_OF_EVT_HANDLERS=1
# end of Device Drivers

#
# External libraries
#
# end of External libraries

#
# Test
#
CONFIG_ZTEST_MULTICORE_DEFAULT_SETTINGS=y
# CONFIG_UNITY is not set

#
# Mocks
#
# CONFIG_MOCK_NRF_MODEM_AT is not set
# end of Mocks
# end of Test
# end of Nordic nRF Connect

CONFIG_ZEPHYR_NRF_MODULE=y
# end of nrf (C:/ncs/v2.4.2/nrf)

#
# hostap (C:/ncs/v2.4.2/modules/lib/hostap)
#
CONFIG_POSIX_MAX_FDS=4
CONFIG_ZEPHYR_HOSTAP_MODULE=y
# end of hostap (C:/ncs/v2.4.2/modules/lib/hostap)

#
# mcuboot (C:/ncs/v2.4.2/bootloader/mcuboot)
#

#
# MCUboot
#
CONFIG_BOOT_SIGNATURE_KEY_FILE=""
CONFIG_DT_FLASH_WRITE_BLOCK_SIZE=4
# end of MCUboot

CONFIG_ZEPHYR_MCUBOOT_MODULE=y
# end of mcuboot (C:/ncs/v2.4.2/bootloader/mcuboot)

#
# mbedtls (C:/ncs/v2.4.2/modules/crypto/mbedtls)
#
CONFIG_ZEPHYR_MBEDTLS_MODULE=y
CONFIG_MBEDTLS_BUILTIN=y
# CONFIG_MBEDTLS_LIBRARY is not set
# end of mbedtls (C:/ncs/v2.4.2/modules/crypto/mbedtls)

#
# trusted-firmware-m (C:/ncs/v2.4.2/modules/tee/tf-m/trusted-firmware-m)
#
# CONFIG_BOOTLOADER_MCUBOOT is not set
CONFIG_ZEPHYR_TRUSTED_FIRMWARE_M_MODULE=y
# end of trusted-firmware-m (C:/ncs/v2.4.2/modules/tee/tf-m/trusted-firmware-m)

#
# cjson (C:/ncs/v2.4.2/modules/lib/cjson)
#
CONFIG_ZEPHYR_CJSON_MODULE=y
# end of cjson (C:/ncs/v2.4.2/modules/lib/cjson)

#
# azure-sdk-for-c (C:/ncs/v2.4.2/modules/lib/azure-sdk-for-c)
#
# CONFIG_AZURE_SDK is not set
CONFIG_ZEPHYR_AZURE_SDK_FOR_C_MODULE=y
# end of azure-sdk-for-c (C:/ncs/v2.4.2/modules/lib/azure-sdk-for-c)

#
# cirrus-logic (C:/ncs/v2.4.2/modules/hal/cirrus-logic)
#
# CONFIG_HW_CODEC_CIRRUS_LOGIC is not set
CONFIG_ZEPHYR_CIRRUS_LOGIC_MODULE=y
# end of cirrus-logic (C:/ncs/v2.4.2/modules/hal/cirrus-logic)

#
# openthread (C:/ncs/v2.4.2/modules/lib/openthread)
#
# CONFIG_OPENTHREAD is not set
CONFIG_ZEPHYR_OPENTHREAD_MODULE=y
# end of openthread (C:/ncs/v2.4.2/modules/lib/openthread)

#
# memfault-firmware-sdk (C:/ncs/v2.4.2/modules/lib/memfault-firmware-sdk)
#
# CONFIG_MEMFAULT is not set
CONFIG_ZEPHYR_MEMFAULT_FIRMWARE_SDK_MODULE=y
# end of memfault-firmware-sdk (C:/ncs/v2.4.2/modules/lib/memfault-firmware-sdk)

#
# canopennode (C:/ncs/v2.4.2/modules/lib/canopennode)
#
CONFIG_ZEPHYR_CANOPENNODE_MODULE=y
# end of canopennode (C:/ncs/v2.4.2/modules/lib/canopennode)

#
# chre (C:/ncs/v2.4.2/modules/lib/chre)
#
CONFIG_ZEPHYR_CHRE_MODULE=y
# CONFIG_CHRE is not set
# end of chre (C:/ncs/v2.4.2/modules/lib/chre)

#
# fatfs (C:/ncs/v2.4.2/modules/fs/fatfs)
#
CONFIG_ZEPHYR_FATFS_MODULE=y
# end of fatfs (C:/ncs/v2.4.2/modules/fs/fatfs)

#
# hal_nordic (C:/ncs/v2.4.2/modules/hal/nordic)
#
CONFIG_ZEPHYR_HAL_NORDIC_MODULE=y
CONFIG_HAS_NORDIC_DRIVERS=y

#
# Nordic drivers
#
# CONFIG_NRF_802154_SOURCE_HAL_NORDIC is not set
# CONFIG_NRF_802154_SER_HOST is not set
# end of Nordic drivers

CONFIG_HAS_NRFX=y

#
# nrfx drivers
#
CONFIG_NRFX_CLOCK=y
CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED=y
# CONFIG_NRFX_COMP is not set
# CONFIG_NRFX_EGU0 is not set
# CONFIG_NRFX_EGU1 is not set
# CONFIG_NRFX_EGU2 is not set
# CONFIG_NRFX_EGU3 is not set
# CONFIG_NRFX_EGU4 is not set
# CONFIG_NRFX_EGU5 is not set
CONFIG_NRFX_GPIOTE=y
# CONFIG_NRFX_I2S is not set
# CONFIG_NRFX_NFCT is not set
# CONFIG_NRFX_NVMC is not set
# CONFIG_NRFX_PDM is not set
# CONFIG_NRFX_POWER is not set
CONFIG_NRFX_PPI=y
# CONFIG_NRFX_PWM0 is not set
# CONFIG_NRFX_PWM1 is not set
# CONFIG_NRFX_PWM2 is not set
# CONFIG_NRFX_QDEC is not set
# CONFIG_NRFX_RNG is not set
# CONFIG_NRFX_RTC0 is not set
# CONFIG_NRFX_RTC1 is not set
# CONFIG_NRFX_RTC2 is not set
# CONFIG_NRFX_SAADC is not set
# CONFIG_NRFX_SPI0 is not set
# CONFIG_NRFX_SPI1 is not set
# CONFIG_NRFX_SPI2 is not set
# CONFIG_NRFX_SYSTICK is not set
# CONFIG_NRFX_TEMP is not set
# CONFIG_NRFX_TIMER0 is not set
# CONFIG_NRFX_TIMER1 is not set
# CONFIG_NRFX_TIMER2 is not set
# CONFIG_NRFX_TIMER3 is not set
# CONFIG_NRFX_TIMER4 is not set
CONFIG_NRFX_TWI=y
CONFIG_NRFX_TWI0=y
CONFIG_NRFX_TWI1=y
# CONFIG_NRFX_UARTE0 is not set
# CONFIG_NRFX_WDT0 is not set

#
# Peripheral Resource Sharing module
#
# CONFIG_NRFX_PRS_BOX_0 is not set
# CONFIG_NRFX_PRS_BOX_1 is not set
# CONFIG_NRFX_PRS_BOX_2 is not set
# CONFIG_NRFX_PRS_BOX_3 is not set
# CONFIG_NRFX_PRS_BOX_4 is not set
# end of Peripheral Resource Sharing module
# end of nrfx drivers
# end of hal_nordic (C:/ncs/v2.4.2/modules/hal/nordic)

#
# liblc3 (C:/ncs/v2.4.2/modules/lib/liblc3)
#
CONFIG_ZEPHYR_LIBLC3_MODULE=y
# end of liblc3 (C:/ncs/v2.4.2/modules/lib/liblc3)

#
# littlefs (C:/ncs/v2.4.2/modules/fs/littlefs)
#
CONFIG_ZEPHYR_LITTLEFS_MODULE=y
# end of littlefs (C:/ncs/v2.4.2/modules/fs/littlefs)

#
# loramac-node (C:/ncs/v2.4.2/modules/lib/loramac-node)
#
CONFIG_ZEPHYR_LORAMAC_NODE_MODULE=y
# CONFIG_HAS_SEMTECH_RADIO_DRIVERS is not set
# end of loramac-node (C:/ncs/v2.4.2/modules/lib/loramac-node)

#
# lvgl (C:/ncs/v2.4.2/modules/lib/gui/lvgl)
#
CONFIG_APP_LINK_WITH_LVGL=y

#
# LVGL configuration
#
# CONFIG_LV_CONF_MINIMAL is not set

#
# Color settings
#
# CONFIG_LV_COLOR_DEPTH_32 is not set
# CONFIG_LV_COLOR_DEPTH_16 is not set
# CONFIG_LV_COLOR_DEPTH_8 is not set
CONFIG_LV_COLOR_DEPTH_1=y
CONFIG_LV_COLOR_DEPTH=1
CONFIG_LV_COLOR_MIX_ROUND_OFS=128
CONFIG_LV_COLOR_CHROMA_KEY_HEX=0x00FF00
# end of Color settings

#
# Memory settings
#
CONFIG_LV_MEM_CUSTOM=y
CONFIG_LV_MEM_CUSTOM_INCLUDE="stdlib.h"
CONFIG_LV_MEM_BUF_MAX_NUM=16
# CONFIG_LV_MEMCPY_MEMSET_STD is not set
# end of Memory settings

#
# HAL Settings
#
CONFIG_LV_DISP_DEF_REFR_PERIOD=30
CONFIG_LV_INDEV_DEF_READ_PERIOD=30
# CONFIG_LV_TICK_CUSTOM is not set
CONFIG_LV_DPI_DEF=130
# end of HAL Settings

#
# Feature configuration
#

#
# Drawing
#
CONFIG_LV_DRAW_COMPLEX=y
CONFIG_LV_SHADOW_CACHE_SIZE=0
CONFIG_LV_CIRCLE_CACHE_SIZE=4
CONFIG_LV_IMG_CACHE_DEF_SIZE=0
CONFIG_LV_GRADIENT_MAX_STOPS=2
CONFIG_LV_GRAD_CACHE_DEF_SIZE=0
# CONFIG_LV_DITHER_GRADIENT is not set
CONFIG_LV_DISP_ROT_MAX_BUF=10240
# end of Drawing

#
# GPU
#
# CONFIG_LV_USE_GPU_STM32_DMA2D is not set
# CONFIG_LV_USE_GPU_NXP_PXP is not set
# CONFIG_LV_USE_GPU_NXP_VG_LITE is not set
# CONFIG_LV_USE_GPU_SDL is not set
# end of GPU

#
# Logging
#
CONFIG_LV_USE_LOG=y
# CONFIG_LV_LOG_LEVEL_TRACE is not set
# CONFIG_LV_LOG_LEVEL_INFO is not set
CONFIG_LV_LOG_LEVEL_WARN=y
# CONFIG_LV_LOG_LEVEL_ERROR is not set
# CONFIG_LV_LOG_LEVEL_USER is not set
# CONFIG_LV_LOG_LEVEL_NONE is not set
CONFIG_LV_LOG_LEVEL=2
# CONFIG_LV_LOG_PRINTF is not set
CONFIG_LV_LOG_TRACE_MEM=y
CONFIG_LV_LOG_TRACE_TIMER=y
CONFIG_LV_LOG_TRACE_INDEV=y
CONFIG_LV_LOG_TRACE_DISP_REFR=y
CONFIG_LV_LOG_TRACE_EVENT=y
CONFIG_LV_LOG_TRACE_OBJ_CREATE=y
CONFIG_LV_LOG_TRACE_LAYOUT=y
CONFIG_LV_LOG_TRACE_ANIM=y
# end of Logging

#
# Asserts
#
CONFIG_LV_USE_ASSERT_NULL=y
CONFIG_LV_USE_ASSERT_MALLOC=y
# CONFIG_LV_USE_ASSERT_STYLE is not set
# CONFIG_LV_USE_ASSERT_MEM_INTEGRITY is not set
# CONFIG_LV_USE_ASSERT_OBJ is not set
CONFIG_LV_ASSERT_HANDLER_INCLUDE="assert.h"
# end of Asserts

#
# Others
#
# CONFIG_LV_USE_PERF_MONITOR is not set
# CONFIG_LV_USE_REFR_DEBUG is not set
# CONFIG_LV_SPRINTF_CUSTOM is not set
# CONFIG_LV_SPRINTF_USE_FLOAT is not set
CONFIG_LV_USE_USER_DATA=y
# CONFIG_LV_ENABLE_GC is not set
# end of Others

#
# Compiler settings
#
# CONFIG_LV_BIG_ENDIAN_SYSTEM is not set
CONFIG_LV_ATTRIBUTE_MEM_ALIGN_SIZE=1
# CONFIG_LV_ATTRIBUTE_FAST_MEM_USE_IRAM is not set
# CONFIG_LV_USE_LARGE_COORD is not set
# end of Compiler settings
# end of Feature configuration

#
# Font usage
#

#
# Enable built-in fonts
#
# CONFIG_LV_FONT_MONTSERRAT_8 is not set
# CONFIG_LV_FONT_MONTSERRAT_10 is not set
# CONFIG_LV_FONT_MONTSERRAT_12 is not set
CONFIG_LV_FONT_MONTSERRAT_14=y
# CONFIG_LV_FONT_MONTSERRAT_16 is not set
# CONFIG_LV_FONT_MONTSERRAT_18 is not set
# CONFIG_LV_FONT_MONTSERRAT_20 is not set
# CONFIG_LV_FONT_MONTSERRAT_22 is not set
# CONFIG_LV_FONT_MONTSERRAT_24 is not set
# CONFIG_LV_FONT_MONTSERRAT_26 is not set
# CONFIG_LV_FONT_MONTSERRAT_28 is not set
# CONFIG_LV_FONT_MONTSERRAT_30 is not set
# CONFIG_LV_FONT_MONTSERRAT_32 is not set
# CONFIG_LV_FONT_MONTSERRAT_34 is not set
# CONFIG_LV_FONT_MONTSERRAT_36 is not set
# CONFIG_LV_FONT_MONTSERRAT_38 is not set
# CONFIG_LV_FONT_MONTSERRAT_40 is not set
# CONFIG_LV_FONT_MONTSERRAT_42 is not set
# CONFIG_LV_FONT_MONTSERRAT_44 is not set
# CONFIG_LV_FONT_MONTSERRAT_46 is not set
# CONFIG_LV_FONT_MONTSERRAT_48 is not set
# CONFIG_LV_FONT_MONTSERRAT_12_SUBPX is not set
# CONFIG_LV_FONT_MONTSERRAT_28_COMPRESSED is not set
# CONFIG_LV_FONT_DEJAVU_16_PERSIAN_HEBREW is not set
# CONFIG_LV_FONT_SIMSUN_16_CJK is not set
# CONFIG_LV_FONT_UNSCII_8 is not set
# CONFIG_LV_FONT_UNSCII_16 is not set
# CONFIG_LV_FONT_CUSTOM is not set
# end of Enable built-in fonts

# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_8 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_12 is not set
CONFIG_LV_FONT_DEFAULT_MONTSERRAT_14=y
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_16 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_18 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_20 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_22 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_24 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_26 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_28 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_30 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_32 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_34 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_36 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_38 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_40 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_42 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_44 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_46 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_48 is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_12_SUBPX is not set
# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_28_COMPRESSED is not set
# CONFIG_LV_FONT_DEFAULT_DEJAVU_16_PERSIAN_HEBREW is not set
# CONFIG_LV_FONT_DEFAULT_SIMSUN_16_CJK is not set
# CONFIG_LV_FONT_DEFAULT_UNSCII_8 is not set
# CONFIG_LV_FONT_DEFAULT_UNSCII_16 is not set
# CONFIG_LV_FONT_FMT_TXT_LARGE is not set
# CONFIG_LV_USE_FONT_COMPRESSED is not set
# CONFIG_LV_USE_FONT_SUBPX is not set
# end of Font usage

#
# Text Settings
#
CONFIG_LV_TXT_ENC_UTF8=y
# CONFIG_LV_TXT_ENC_ASCII is not set
CONFIG_LV_TXT_BREAK_CHARS=" ,.;:-_"
CONFIG_LV_TXT_LINE_BREAK_LONG_LEN=0
CONFIG_LV_TXT_COLOR_CMD="#"
# CONFIG_LV_USE_BIDI is not set
# CONFIG_LV_USE_ARABIC_PERSIAN_CHARS is not set
# end of Text Settings

#
# Widget usage
#
CONFIG_LV_USE_ARC=y
CONFIG_LV_USE_BAR=y
CONFIG_LV_USE_BTN=y
CONFIG_LV_USE_BTNMATRIX=y
CONFIG_LV_USE_CANVAS=y
CONFIG_LV_USE_CHECKBOX=y
CONFIG_LV_USE_DROPDOWN=y
CONFIG_LV_USE_IMG=y
CONFIG_LV_USE_LABEL=y
CONFIG_LV_LABEL_TEXT_SELECTION=y
CONFIG_LV_LABEL_LONG_TXT_HINT=y
CONFIG_LV_USE_LINE=y
CONFIG_LV_USE_ROLLER=y
CONFIG_LV_ROLLER_INF_PAGES=7
CONFIG_LV_USE_SLIDER=y
CONFIG_LV_USE_SWITCH=y
CONFIG_LV_USE_TEXTAREA=y
CONFIG_LV_TEXTAREA_DEF_PWD_SHOW_TIME=1500
CONFIG_LV_USE_TABLE=y
# end of Widget usage

#
# Extra Widgets
#
CONFIG_LV_USE_ANIMIMG=y
CONFIG_LV_USE_CALENDAR=y
# CONFIG_LV_CALENDAR_WEEK_STARTS_MONDAY is not set
CONFIG_LV_USE_CALENDAR_HEADER_ARROW=y
CONFIG_LV_USE_CALENDAR_HEADER_DROPDOWN=y
CONFIG_LV_USE_CHART=y
CONFIG_LV_USE_COLORWHEEL=y
CONFIG_LV_USE_IMGBTN=y
CONFIG_LV_USE_KEYBOARD=y
CONFIG_LV_USE_LED=y
CONFIG_LV_USE_LIST=y
CONFIG_LV_USE_MENU=y
CONFIG_LV_USE_METER=y
CONFIG_LV_USE_MSGBOX=y
CONFIG_LV_USE_SPINBOX=y
CONFIG_LV_USE_SPINNER=y
CONFIG_LV_USE_TABVIEW=y
CONFIG_LV_USE_TILEVIEW=y
CONFIG_LV_USE_WIN=y
CONFIG_LV_USE_SPAN=y
CONFIG_LV_SPAN_SNIPPET_STACK_SIZE=64
# end of Extra Widgets

#
# Themes
#
CONFIG_LV_USE_THEME_DEFAULT=y
# CONFIG_LV_THEME_DEFAULT_DARK is not set
CONFIG_LV_THEME_DEFAULT_GROW=y
CONFIG_LV_THEME_DEFAULT_TRANSITION_TIME=80
CONFIG_LV_USE_THEME_BASIC=y
# end of Themes

#
# Layouts
#
CONFIG_LV_USE_FLEX=y
CONFIG_LV_USE_GRID=y
# end of Layouts

#
# 3rd Party Libraries
#
# CONFIG_LV_USE_FS_STDIO is not set
# CONFIG_LV_USE_FS_POSIX is not set
# CONFIG_LV_USE_FS_WIN32 is not set
# CONFIG_LV_USE_FS_FATFS is not set
# CONFIG_LV_USE_PNG is not set
# CONFIG_LV_USE_BMP is not set
# CONFIG_LV_USE_SJPG is not set
# CONFIG_LV_USE_GIF is not set
# CONFIG_LV_USE_QRCODE is not set
# CONFIG_LV_USE_FREETYPE is not set
# CONFIG_LV_USE_RLOTTIE is not set
# CONFIG_LV_USE_FFMPEG is not set
# end of 3rd Party Libraries

#
# Others
#
CONFIG_LV_USE_SNAPSHOT=y
# CONFIG_LV_USE_MONKEY is not set
# CONFIG_LV_USE_GRIDNAV is not set
# CONFIG_LV_USE_FRAGMENT is not set
# end of Others

#
# Examples
#
CONFIG_LV_BUILD_EXAMPLES=y
# end of Examples

#
# Demos
#
# CONFIG_LV_USE_DEMO_WIDGETS is not set
# CONFIG_LV_USE_DEMO_KEYPAD_AND_ENCODER is not set
# CONFIG_LV_USE_DEMO_BENCHMARK is not set
# CONFIG_LV_USE_DEMO_STRESS is not set
# CONFIG_LV_USE_DEMO_MUSIC is not set
# end of Demos
# end of LVGL configuration

#
# Memory manager settings
#
CONFIG_LV_Z_MEM_POOL_SYS_HEAP=y
CONFIG_LV_Z_MEM_POOL_MIN_SIZE=16
CONFIG_LV_Z_MEM_POOL_MAX_SIZE=2048
CONFIG_LV_Z_MEM_POOL_NUMBER_BLOCKS=8
# CONFIG_LV_Z_DOUBLE_VDB is not set
CONFIG_LV_Z_BUFFER_ALLOC_STATIC=y
# CONFIG_LV_Z_BUFFER_ALLOC_DYNAMIC is not set
# end of Memory manager settings

#
# Input device settings
#
CONFIG_LV_Z_POINTER_KSCAN_MSGQ_COUNT=10
# end of Input device settings

CONFIG_ZEPHYR_LVGL_MODULE=y
# end of lvgl (C:/ncs/v2.4.2/modules/lib/gui/lvgl)

#
# lz4 (C:/ncs/v2.4.2/modules/lib/lz4)
#
CONFIG_ZEPHYR_LZ4_MODULE=y
# CONFIG_LZ4 is not set
# end of lz4 (C:/ncs/v2.4.2/modules/lib/lz4)

#
# nanopb (C:/ncs/v2.4.2/modules/lib/nanopb)
#
CONFIG_ZEPHYR_NANOPB_MODULE=y
# CONFIG_NANOPB is not set
# end of nanopb (C:/ncs/v2.4.2/modules/lib/nanopb)

#
# picolibc (C:/ncs/v2.4.2/modules/lib/picolibc)
#
# CONFIG_PICOLIBC_MODULE is not set
CONFIG_ZEPHYR_PICOLIBC_MODULE=y
# end of picolibc (C:/ncs/v2.4.2/modules/lib/picolibc)

#
# segger (C:/ncs/v2.4.2/modules/debug/segger)
#
CONFIG_ZEPHYR_SEGGER_MODULE=y
CONFIG_HAS_SEGGER_RTT=y
CONFIG_USE_SEGGER_RTT=y
CONFIG_SEGGER_RTT_CUSTOM_LOCKING=y
CONFIG_SEGGER_RTT_MAX_NUM_UP_BUFFERS=3
CONFIG_SEGGER_RTT_MAX_NUM_DOWN_BUFFERS=3
CONFIG_SEGGER_RTT_BUFFER_SIZE_UP=1024
CONFIG_SEGGER_RTT_BUFFER_SIZE_DOWN=16
CONFIG_SEGGER_RTT_PRINTF_BUFFER_SIZE=64
CONFIG_SEGGER_RTT_MODE_NO_BLOCK_SKIP=y
# CONFIG_SEGGER_RTT_MODE_NO_BLOCK_TRIM is not set
# CONFIG_SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL is not set
CONFIG_SEGGER_RTT_MODE=0
# CONFIG_SEGGER_RTT_MEMCPY_USE_BYTELOOP is not set
CONFIG_SEGGER_RTT_SECTION_NONE=y
# CONFIG_SEGGER_RTT_SECTION_DTCM is not set
# end of segger (C:/ncs/v2.4.2/modules/debug/segger)

#
# TraceRecorder (C:/ncs/v2.4.2/modules/debug/TraceRecorder)
#
CONFIG_ZEPHYR_TRACERECORDER_MODULE=y
# end of TraceRecorder (C:/ncs/v2.4.2/modules/debug/TraceRecorder)

#
# uoscore-uedhoc (C:/ncs/v2.4.2/modules/lib/uoscore-uedhoc)
#
CONFIG_ZEPHYR_UOSCORE_UEDHOC_MODULE=y
# end of uoscore-uedhoc (C:/ncs/v2.4.2/modules/lib/uoscore-uedhoc)

#
# zcbor (C:/ncs/v2.4.2/modules/lib/zcbor)
#
CONFIG_ZEPHYR_ZCBOR_MODULE=y
# CONFIG_ZCBOR is not set
# end of zcbor (C:/ncs/v2.4.2/modules/lib/zcbor)

#
# zscilib (C:/ncs/v2.4.2/modules/lib/zscilib)
#
# CONFIG_ZSL is not set
CONFIG_ZEPHYR_ZSCILIB_MODULE=y
# end of zscilib (C:/ncs/v2.4.2/modules/lib/zscilib)

#
# nrfxlib (C:/ncs/v2.4.2/nrfxlib)
#

#
# Nordic nrfxlib
#
CONFIG_NRF_MODEM_SHMEM_CTRL_SIZE=0x4e8
# CONFIG_NFC_T2T_NRFXLIB is not set
# CONFIG_NFC_T4T_NRFXLIB is not set
# CONFIG_MPSL is not set

#
# Crypto libraries for nRF5x SOCs.
#
# CONFIG_NRF_OBERON is not set
# CONFIG_NRF_CC310_BL is not set
# end of Crypto libraries for nRF5x SOCs.

#
# nrf_security module
#
# CONFIG_NORDIC_SECURITY_BACKEND is not set
# CONFIG_NRF_SECURITY is not set
# end of nrf_security module

# CONFIG_NRF_RPC is not set
CONFIG_NRF_802154_SOURCE_NRFXLIB=y
# CONFIG_GZLL is not set
# CONFIG_NRF_DM is not set
# CONFIG_LC3_PLC_DISABLED is not set
CONFIG_LC3_ENC_CHAN_MAX=1
CONFIG_LC3_DEC_CHAN_MAX=1

#
# Encoder sample rates
#
CONFIG_LC3_ENC_SAMPLE_RATE_8KHZ_SUPPORT=y
CONFIG_LC3_ENC_SAMPLE_RATE_16KHZ_SUPPORT=y
CONFIG_LC3_ENC_SAMPLE_RATE_24KHZ_SUPPORT=y
CONFIG_LC3_ENC_SAMPLE_RATE_32KHZ_SUPPORT=y
CONFIG_LC3_ENC_SAMPLE_RATE_441KHZ_SUPPORT=y
CONFIG_LC3_ENC_SAMPLE_RATE_48KHZ_SUPPORT=y
# end of Encoder sample rates

#
# Decoder sample rates
#
CONFIG_LC3_DEC_SAMPLE_RATE_8KHZ_SUPPORT=y
CONFIG_LC3_DEC_SAMPLE_RATE_16KHZ_SUPPORT=y
CONFIG_LC3_DEC_SAMPLE_RATE_24KHZ_SUPPORT=y
CONFIG_LC3_DEC_SAMPLE_RATE_32KHZ_SUPPORT=y
CONFIG_LC3_DEC_SAMPLE_RATE_441KHZ_SUPPORT=y
CONFIG_LC3_DEC_SAMPLE_RATE_48KHZ_SUPPORT=y
# end of Decoder sample rates

# CONFIG_NRF_FUEL_GAUGE is not set
# end of Nordic nrfxlib

CONFIG_ZEPHYR_NRFXLIB_MODULE=y
# end of nrfxlib (C:/ncs/v2.4.2/nrfxlib)

#
# connectedhomeip (C:/ncs/v2.4.2/modules/lib/matter)
#
# CONFIG_CHIP is not set
# CONFIG_CHIP_LOG_SIZE_OPTIMIZATION is not set
CONFIG_ZEPHYR_CONNECTEDHOMEIP_MODULE=y
# end of connectedhomeip (C:/ncs/v2.4.2/modules/lib/matter)

#
# Optional modules. Make sure they're installed, via the project manifest.
#
CONFIG_HAS_CMSIS_CORE=y
CONFIG_HAS_CMSIS_CORE_M=y
# CONFIG_CMSIS_DSP is not set
# CONFIG_CMSIS_NN is not set
# CONFIG_LIBMETAL is not set
CONFIG_LVGL=y
# CONFIG_HAS_MEC_HAL is not set
# CONFIG_HAS_MPFS_HAL is not set
# CONFIG_OPENAMP is not set
# CONFIG_SOF is not set
# CONFIG_MIPI_SYST_LIB is not set
# CONFIG_HAS_TELINK_DRIVERS is not set
# CONFIG_MCUBOOT_BOOTUTIL_LIB is not set

#
# Unavailable modules, please install those via the project manifest.
#

#
# hal_gigadevice module not available.
#

#
# Trusted-firmware-a module not available.
#

#
# THRIFT module not available.
#
# end of Modules

CONFIG_BOARD_REVISION="$BOARD_REVISION"
# CONFIG_NET_DRIVERS is not set
CONFIG_BOARD_NRF52DK_NRF52832=y
CONFIG_SHIELD_SSD1306_128X64=y

#
# Board Options
#
CONFIG_BOARD_ENABLE_DCDC=y
# end of Board Options

# CONFIG_SOC_SERIES_BEETLE is not set
# CONFIG_SOC_SERIES_ARM_DESIGNSTART is not set
# CONFIG_SOC_SERIES_FVP_AEMV8R_AARCH32 is not set
# CONFIG_SOC_SERIES_MPS2 is not set
# CONFIG_SOC_SERIES_MPS3 is not set
# CONFIG_SOC_SERIES_MUSCA_B1 is not set
# CONFIG_SOC_SERIES_MUSCA_S1 is not set
# CONFIG_SOC_SERIES_AST10X0 is not set
# CONFIG_SOC_SERIES_SAMC20 is not set
# CONFIG_SOC_SERIES_SAMC21 is not set
# CONFIG_SOC_SERIES_SAMD20 is not set
# CONFIG_SOC_SERIES_SAMD21 is not set
# CONFIG_SOC_SERIES_SAMD51 is not set
# CONFIG_SOC_SERIES_SAME51 is not set
# CONFIG_SOC_SERIES_SAME53 is not set
# CONFIG_SOC_SERIES_SAME54 is not set
# CONFIG_SOC_SERIES_SAML21 is not set
# CONFIG_SOC_SERIES_SAMR21 is not set
# CONFIG_SOC_SERIES_SAMR34 is not set
# CONFIG_SOC_SERIES_SAMR35 is not set
# CONFIG_SOC_SERIES_SAM3X is not set
# CONFIG_SOC_SERIES_SAM4E is not set
# CONFIG_SOC_SERIES_SAM4L is not set
# CONFIG_SOC_SERIES_SAM4S is not set
# CONFIG_SOC_SERIES_SAME70 is not set
# CONFIG_SOC_SERIES_SAMV71 is not set
# CONFIG_SOC_SERIES_VALKYRIE is not set
# CONFIG_SOC_SERIES_VIPER is not set
# CONFIG_SOC_SERIES_PSOC62 is not set
# CONFIG_SOC_SERIES_PSOC63 is not set
# CONFIG_SOC_SERIES_GD32A50X is not set
# CONFIG_SOC_SERIES_GD32E10X is not set
# CONFIG_SOC_SERIES_GD32E50X is not set
# CONFIG_SOC_SERIES_GD32F3X0 is not set
# CONFIG_SOC_SERIES_GD32F403 is not set
# CONFIG_SOC_SERIES_GD32F4XX is not set
# CONFIG_SOC_SERIES_GD32L23X is not set
# CONFIG_SOC_SERIES_PSOC_60 is not set
# CONFIG_SOC_SERIES_PSOC_61 is not set
# CONFIG_SOC_SERIES_PSOC_62 is not set
# CONFIG_SOC_SERIES_PSOC_63 is not set
# CONFIG_SOC_SERIES_PSOC_64 is not set
# CONFIG_SOC_SERIES_XMC_4XXX is not set
# CONFIG_SOC_SERIES_CYCLONE5 is not set
# CONFIG_SOC_SERIES_MEC1501X is not set
# CONFIG_SOC_SERIES_MEC1701X is not set
# CONFIG_SOC_SERIES_MEC172X is not set
# CONFIG_SOC_SERIES_NRF51X is not set
CONFIG_SOC_SERIES_NRF52X=y
# CONFIG_SOC_SERIES_NRF53X is not set
# CONFIG_SOC_SERIES_NRF91X is not set
# CONFIG_SOC_SERIES_NPCX7 is not set
# CONFIG_SOC_SERIES_NPCX9 is not set
# CONFIG_SOC_SERIES_M48X is not set
# CONFIG_SOC_SERIES_IMX_6X_M4 is not set
# CONFIG_SOC_SERIES_IMX7_M4 is not set
# CONFIG_SOC_SERIES_IMX8ML_M7 is not set
# CONFIG_SOC_SERIES_IMX8MM_M4 is not set
# CONFIG_SOC_SERIES_IMX8MQ_M4 is not set
# CONFIG_SOC_SERIES_IMX_RT5XX is not set
# CONFIG_SOC_SERIES_IMX_RT6XX is not set
# CONFIG_SOC_SERIES_IMX_RT is not set
# CONFIG_SOC_SERIES_KINETIS_K2X is not set
# CONFIG_SOC_SERIES_KINETIS_K6X is not set
# CONFIG_SOC_SERIES_KINETIS_K8X is not set
# CONFIG_SOC_SERIES_KINETIS_KE1XF is not set
# CONFIG_SOC_SERIES_KINETIS_KL2X is not set
# CONFIG_SOC_SERIES_KINETIS_KV5X is not set
# CONFIG_SOC_SERIES_KINETIS_KWX is not set
# CONFIG_SOC_SERIES_LPC11U6X is not set
# CONFIG_SOC_SERIES_LPC51U68 is not set
# CONFIG_SOC_SERIES_LPC54XXX is not set
# CONFIG_SOC_SERIES_LPC55XXX is not set
# CONFIG_SOC_SERIES_S32ZE_R52 is not set
# CONFIG_SOC_EOS_S3 is not set
# CONFIG_SOC_SERIES_RCAR_GEN3 is not set
# CONFIG_SOC_SERIES_DA1469X is not set
# CONFIG_SOC_SERIES_RP2XXX is not set
# CONFIG_SOC_SERIES_EFM32GG11B is not set
# CONFIG_SOC_SERIES_EFM32HG is not set
# CONFIG_SOC_SERIES_EFM32JG12B is not set
# CONFIG_SOC_SERIES_EFM32PG12B is not set
# CONFIG_SOC_SERIES_EFM32PG1B is not set
# CONFIG_SOC_SERIES_EFM32WG is not set
# CONFIG_SOC_SERIES_EFR32BG13P is not set
# CONFIG_SOC_SERIES_EFR32BG22 is not set
# CONFIG_SOC_SERIES_EFR32FG13P is not set
# CONFIG_SOC_SERIES_EFR32FG1P is not set
# CONFIG_SOC_SERIES_EFR32MG12P is not set
# CONFIG_SOC_SERIES_EFR32MG21 is not set
# CONFIG_SOC_SERIES_EFR32MG24 is not set
# CONFIG_SOC_SERIES_STM32C0X is not set
# CONFIG_SOC_SERIES_STM32F0X is not set
# CONFIG_SOC_SERIES_STM32F1X is not set
# CONFIG_SOC_SERIES_STM32F2X is not set
# CONFIG_SOC_SERIES_STM32F3X is not set
# CONFIG_SOC_SERIES_STM32F4X is not set
# CONFIG_SOC_SERIES_STM32F7X is not set
# CONFIG_SOC_SERIES_STM32G0X is not set
# CONFIG_SOC_SERIES_STM32G4X is not set
# CONFIG_SOC_SERIES_STM32H5X is not set
# CONFIG_SOC_SERIES_STM32H7X is not set
# CONFIG_SOC_SERIES_STM32L0X is not set
# CONFIG_SOC_SERIES_STM32L1X is not set
# CONFIG_SOC_SERIES_STM32L4X is not set
# CONFIG_SOC_SERIES_STM32L5X is not set
# CONFIG_SOC_SERIES_STM32MP1X is not set
# CONFIG_SOC_SERIES_STM32U5X is not set
# CONFIG_SOC_SERIES_STM32WBX is not set
# CONFIG_SOC_SERIES_STM32WLX is not set
# CONFIG_SOC_TI_LM3S6965 is not set
# CONFIG_SOC_SERIES_CC13X2_CC26X2 is not set
# CONFIG_SOC_SERIES_CC13X2X7_CC26X2X7 is not set
# CONFIG_SOC_SERIES_CC32XX is not set
# CONFIG_SOC_SERIES_MSP432P4XX is not set
# CONFIG_SOC_SERIES_XILINX_XC7ZXXX is not set
# CONFIG_SOC_SERIES_XILINX_XC7ZXXXS is not set
# CONFIG_SOC_XILINX_ZYNQMP_RPU is not set

#
# Hardware Configuration
#
CONFIG_CPU_HAS_ARM_MPU=y
CONFIG_HAS_SWO=y
CONFIG_SOC_FAMILY="nordic_nrf"
CONFIG_SOC_FAMILY_NRF=y
CONFIG_HAS_HW_NRF_BPROT=y
CONFIG_HAS_HW_NRF_CCM=y
CONFIG_HAS_HW_NRF_CCM_LFLEN_8BIT=y
CONFIG_HAS_HW_NRF_CLOCK=y
CONFIG_HAS_HW_NRF_ECB=y
CONFIG_HAS_HW_NRF_EGU0=y
CONFIG_HAS_HW_NRF_EGU1=y
CONFIG_HAS_HW_NRF_EGU2=y
CONFIG_HAS_HW_NRF_EGU3=y
CONFIG_HAS_HW_NRF_EGU4=y
CONFIG_HAS_HW_NRF_EGU5=y
CONFIG_HAS_HW_NRF_GPIO0=y
CONFIG_HAS_HW_NRF_GPIOTE=y
CONFIG_HAS_HW_NRF_MWU=y
CONFIG_HAS_HW_NRF_NFCT=y
CONFIG_HAS_HW_NRF_POWER=y
CONFIG_HAS_HW_NRF_PPI=y
CONFIG_HAS_HW_NRF_PWM0=y
CONFIG_HAS_HW_NRF_RADIO_BLE_2M=y
CONFIG_HAS_HW_NRF_RNG=y
CONFIG_HAS_HW_NRF_SAADC=y
CONFIG_HAS_HW_NRF_SPI1=y
CONFIG_HAS_HW_NRF_SPI2=y
CONFIG_HAS_HW_NRF_SWI0=y
CONFIG_HAS_HW_NRF_SWI1=y
CONFIG_HAS_HW_NRF_SWI2=y
CONFIG_HAS_HW_NRF_SWI3=y
CONFIG_HAS_HW_NRF_SWI4=y
CONFIG_HAS_HW_NRF_SWI5=y
CONFIG_HAS_HW_NRF_TEMP=y
CONFIG_HAS_HW_NRF_TWI0=y
CONFIG_HAS_HW_NRF_TWI1=y
CONFIG_HAS_HW_NRF_UARTE0=y
CONFIG_HAS_HW_NRF_WDT0=y
CONFIG_SOC_NRF52832=y
# CONFIG_SOC_NRF52805_CAAA is not set
# CONFIG_SOC_NRF52810_QFAA is not set
# CONFIG_SOC_NRF52811_QFAA is not set
# CONFIG_SOC_NRF52820_QDAA is not set
# CONFIG_SOC_NRF52832_CIAA is not set
CONFIG_SOC_NRF52832_QFAA=y
# CONFIG_SOC_NRF52832_QFAB is not set
# CONFIG_SOC_NRF52833_QIAA is not set
# CONFIG_SOC_NRF52840_QIAA is not set
CONFIG_SOC_DCDC_NRF52X=y
CONFIG_GPIO_AS_PINRESET=y
CONFIG_NRF_ENABLE_ICACHE=y
CONFIG_NRF52_ANOMALY_132_DELAY_US=330
CONFIG_NRF_RTC_TIMER_USER_CHAN_COUNT=0
CONFIG_NRF_SOC_SECURE_SUPPORTED=y
# CONFIG_NFCT_PINS_AS_GPIOS is not set
CONFIG_NRF_APPROTECT_USE_UICR=y
# CONFIG_NRF_APPROTECT_LOCK is not set
# CONFIG_NRF_TRACE_PORT is not set
# CONFIG_BUILD_OUTPUT_INFO_HEADER is not set
# CONFIG_SOC_LOG_LEVEL_OFF is not set
# CONFIG_SOC_LOG_LEVEL_ERR is not set
# CONFIG_SOC_LOG_LEVEL_WRN is not set
# CONFIG_SOC_LOG_LEVEL_INF is not set
# CONFIG_SOC_LOG_LEVEL_DBG is not set
CONFIG_SOC_LOG_LEVEL_DEFAULT=y
CONFIG_SOC_LOG_LEVEL=3
# end of Hardware Configuration

CONFIG_SOC_COMPATIBLE_NRF=y
CONFIG_SOC_COMPATIBLE_NRF52X=y

#
# ARM Options
#
CONFIG_ARCH="arm"
CONFIG_CPU_CORTEX=y
# CONFIG_CODE_DATA_RELOCATION_SRAM is not set
CONFIG_CPU_CORTEX_M=y
# CONFIG_ARM_ZIMAGE_HEADER is not set
CONFIG_ISA_THUMB2=y
CONFIG_ASSEMBLER_ISA_THUMB2=y
CONFIG_COMPILER_ISA_THUMB2=y
CONFIG_STACK_ALIGN_DOUBLE_WORD=y
# CONFIG_RUNTIME_NMI is not set
CONFIG_FAULT_DUMP=2
CONFIG_ARM_STACK_PROTECTION=y
CONFIG_CPU_CORTEX_M4=y
CONFIG_CPU_CORTEX_M_HAS_SYSTICK=y
CONFIG_CPU_CORTEX_M_HAS_DWT=y
CONFIG_CPU_CORTEX_M_HAS_BASEPRI=y
CONFIG_CPU_CORTEX_M_HAS_VTOR=y
CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS=y
CONFIG_ARMV7_M_ARMV8_M_MAINLINE=y
CONFIG_ARMV7_M_ARMV8_M_FP=y

#
# ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33 options
#
CONFIG_GEN_ISR_TABLES=y
# CONFIG_ZERO_LATENCY_IRQS is not set
# CONFIG_SW_VECTOR_RELAY is not set
# CONFIG_CORTEX_M_DWT is not set
# CONFIG_CORTEX_M_DEBUG_MONITOR_HOOK is not set
# CONFIG_TRAP_UNALIGNED_ACCESS is not set
# end of ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33 options

CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
# CONFIG_NULL_POINTER_EXCEPTION_DETECTION_DWT is not set
# CONFIG_NULL_POINTER_EXCEPTION_DETECTION_MPU is not set
CONFIG_GEN_IRQ_VECTOR_TABLE=y
CONFIG_ARM_MPU=y
CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE=32
CONFIG_MPU_STACK_GUARD=y
# CONFIG_MPU_ALLOW_FLASH_WRITE is not set
# CONFIG_MPU_DISABLE_BACKGROUND_MAP is not set
# CONFIG_CUSTOM_SECTION_ALIGN is not set
CONFIG_CUSTOM_SECTION_MIN_ALIGN_SIZE=32
# end of ARM Options

CONFIG_ARM=y
CONFIG_ARCH_IS_SET=y

#
# General Architecture Options
#
# CONFIG_SEMIHOST is not set
# CONFIG_ARCH_LOG_LEVEL_OFF is not set
# CONFIG_ARCH_LOG_LEVEL_ERR is not set
# CONFIG_ARCH_LOG_LEVEL_WRN is not set
# CONFIG_ARCH_LOG_LEVEL_INF is not set
# CONFIG_ARCH_LOG_LEVEL_DBG is not set
CONFIG_ARCH_LOG_LEVEL_DEFAULT=y
CONFIG_ARCH_LOG_LEVEL=3
CONFIG_LITTLE_ENDIAN=y
CONFIG_HW_STACK_PROTECTION=y
# CONFIG_USERSPACE is not set
CONFIG_KOBJECT_TEXT_AREA=256
CONFIG_KOBJECT_DATA_AREA_RESERVE_EXTRA_PERCENT=100
CONFIG_KOBJECT_RODATA_AREA_EXTRA_BYTES=16
CONFIG_GEN_PRIV_STACKS=y
# CONFIG_STACK_GROWS_UP is not set

#
# Interrupt Configuration
#
# CONFIG_DYNAMIC_INTERRUPTS is not set
CONFIG_ARCH_IRQ_VECTOR_TABLE_ALIGN=4
CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_ADDRESS=y
# CONFIG_IRQ_VECTOR_TABLE_JUMP_BY_CODE is not set
CONFIG_GEN_SW_ISR_TABLE=y
CONFIG_ARCH_SW_ISR_TABLE_ALIGN=4
CONFIG_GEN_IRQ_START_VECTOR=0
# CONFIG_EXTRA_EXCEPTION_INFO is not set
# CONFIG_SIMPLIFIED_EXCEPTION_CODES is not set
# end of Interrupt Configuration
# end of General Architecture Options

CONFIG_ARCH_HAS_SINGLE_THREAD_SUPPORT=y
CONFIG_ARCH_HAS_TIMING_FUNCTIONS=y
CONFIG_ARCH_HAS_STACK_PROTECTION=y
CONFIG_ARCH_HAS_USERSPACE=y
CONFIG_ARCH_HAS_EXECUTABLE_PAGE_BIT=y
CONFIG_ARCH_HAS_RAMFUNC_SUPPORT=y
CONFIG_ARCH_HAS_NESTED_EXCEPTION_DETECTION=y
CONFIG_ARCH_SUPPORTS_COREDUMP=y
CONFIG_ARCH_SUPPORTS_ARCH_HW_INIT=y
CONFIG_ARCH_HAS_EXTRA_EXCEPTION_INFO=y
CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE=y
CONFIG_ARCH_HAS_SUSPEND_TO_RAM=y
CONFIG_ARCH_HAS_THREAD_ABORT=y
CONFIG_ARCH_HAS_CODE_DATA_RELOCATION=y
CONFIG_CPU_HAS_FPU=y
CONFIG_CPU_HAS_MPU=y
CONFIG_MPU=y
# CONFIG_MPU_LOG_LEVEL_OFF is not set
# CONFIG_MPU_LOG_LEVEL_ERR is not set
# CONFIG_MPU_LOG_LEVEL_WRN is not set
# CONFIG_MPU_LOG_LEVEL_INF is not set
# CONFIG_MPU_LOG_LEVEL_DBG is not set
CONFIG_MPU_LOG_LEVEL_DEFAULT=y
CONFIG_MPU_LOG_LEVEL=3
CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT=y
CONFIG_SRAM_REGION_PERMISSIONS=y

#
# Floating Point Options
#
# end of Floating Point Options

#
# Cache Options
#
# end of Cache Options

CONFIG_TOOLCHAIN_HAS_BUILTIN_FFS=y

#
# General Kernel Options
#
# CONFIG_KERNEL_LOG_LEVEL_OFF is not set
# CONFIG_KERNEL_LOG_LEVEL_ERR is not set
# CONFIG_KERNEL_LOG_LEVEL_WRN is not set
# CONFIG_KERNEL_LOG_LEVEL_INF is not set
# CONFIG_KERNEL_LOG_LEVEL_DBG is not set
CONFIG_KERNEL_LOG_LEVEL_DEFAULT=y
CONFIG_KERNEL_LOG_LEVEL=3
CONFIG_MULTITHREADING=y
CONFIG_NUM_COOP_PRIORITIES=16
CONFIG_NUM_PREEMPT_PRIORITIES=15
CONFIG_MAIN_THREAD_PRIORITY=0
CONFIG_COOP_ENABLED=y
CONFIG_PREEMPT_ENABLED=y
CONFIG_PRIORITY_CEILING=-127
# CONFIG_SCHED_DEADLINE is not set
# CONFIG_SCHED_CPU_MASK is not set
CONFIG_IDLE_STACK_SIZE=320
CONFIG_ISR_STACK_SIZE=2048
CONFIG_THREAD_STACK_INFO=y
# CONFIG_THREAD_CUSTOM_DATA is not set
CONFIG_ERRNO=y
CONFIG_SCHED_DUMB=y
# CONFIG_SCHED_SCALABLE is not set
# CONFIG_SCHED_MULTIQ is not set
# CONFIG_WAITQ_SCALABLE is not set
CONFIG_WAITQ_DUMB=y

#
# Kernel Debugging and Metrics
#
CONFIG_BOOT_BANNER=y
CONFIG_BOOT_DELAY=0
# CONFIG_THREAD_MONITOR is not set
# CONFIG_THREAD_NAME is not set
# CONFIG_THREAD_RUNTIME_STATS is not set
# end of Kernel Debugging and Metrics

#
# Work Queue Options
#
CONFIG_SYSTEM_WORKQUEUE_PRIORITY=-1
# CONFIG_SYSTEM_WORKQUEUE_NO_YIELD is not set
# end of Work Queue Options

#
# Atomic Operations
#
CONFIG_ATOMIC_OPERATIONS_BUILTIN=y
# end of Atomic Operations

#
# Timer API Options
#
CONFIG_TIMESLICING=y
CONFIG_TIMESLICE_SIZE=0
CONFIG_TIMESLICE_PRIORITY=0
# CONFIG_TIMESLICE_PER_THREAD is not set
# CONFIG_POLL is not set
# end of Timer API Options

#
# Other Kernel Object Options
#
# CONFIG_MEM_SLAB_TRACE_MAX_UTILIZATION is not set
CONFIG_NUM_MBOX_ASYNC_MSGS=10
# CONFIG_EVENTS is not set
# CONFIG_PIPES is not set
CONFIG_KERNEL_MEM_POOL=y
# end of Other Kernel Object Options

CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN=y
CONFIG_SWAP_NONATOMIC=y
CONFIG_SYS_CLOCK_EXISTS=y
CONFIG_TIMEOUT_64BIT=y
CONFIG_SYS_CLOCK_MAX_TIMEOUT_DAYS=365
CONFIG_XIP=y

#
# Initialization Priorities
#
CONFIG_KERNEL_INIT_PRIORITY_OBJECTS=30
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT=40
CONFIG_KERNEL_INIT_PRIORITY_DEVICE=50
CONFIG_APPLICATION_INIT_PRIORITY=90
# end of Initialization Priorities

#
# Security Options
#
# end of Security Options

#
# SMP Options
#
CONFIG_MP_NUM_CPUS=1
# end of SMP Options

CONFIG_TICKLESS_KERNEL=y
CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE=y
# CONFIG_THREAD_LOCAL_STORAGE is not set
# end of General Kernel Options

#
# Device Options
#
# end of Device Options

#
# Virtual Memory Support
#
# end of Virtual Memory Support

#
# Device Drivers
#
# CONFIG_ADC is not set
# CONFIG_AUDIO is not set
# CONFIG_BBRAM is not set
# CONFIG_CACHE is not set
# CONFIG_CAN is not set
# CONFIG_CLOCK_CONTROL_LOG_LEVEL_OFF is not set
# CONFIG_CLOCK_CONTROL_LOG_LEVEL_ERR is not set
# CONFIG_CLOCK_CONTROL_LOG_LEVEL_WRN is not set
# CONFIG_CLOCK_CONTROL_LOG_LEVEL_INF is not set
# CONFIG_CLOCK_CONTROL_LOG_LEVEL_DBG is not set
CONFIG_CLOCK_CONTROL_LOG_LEVEL_DEFAULT=y
CONFIG_CLOCK_CONTROL_LOG_LEVEL=3
CONFIG_CLOCK_CONTROL_NRF=y
# CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC is not set
CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y
# CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH is not set
# CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_LOW_SWING is not set
# CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_FULL_SWING is not set
# CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM is not set
# CONFIG_CLOCK_CONTROL_NRF_K32SRC_250PPM is not set
# CONFIG_CLOCK_CONTROL_NRF_K32SRC_150PPM is not set
# CONFIG_CLOCK_CONTROL_NRF_K32SRC_100PPM is not set
# CONFIG_CLOCK_CONTROL_NRF_K32SRC_75PPM is not set
CONFIG_CLOCK_CONTROL_NRF_K32SRC_50PPM=y
# CONFIG_CLOCK_CONTROL_NRF_K32SRC_30PPM is not set
# CONFIG_CLOCK_CONTROL_NRF_K32SRC_20PPM is not set
CONFIG_CLOCK_CONTROL_NRF_ACCURACY=50
CONFIG_CONSOLE=y
CONFIG_CONSOLE_INPUT_MAX_LINE_LEN=128
CONFIG_CONSOLE_HAS_DRIVER=y
# CONFIG_CONSOLE_HANDLER is not set
CONFIG_CONSOLE_INIT_PRIORITY=60
CONFIG_UART_CONSOLE=y
# CONFIG_UART_CONSOLE_DEBUG_SERVER_HOOKS is not set
# CONFIG_UART_CONSOLE_MCUMGR is not set
CONFIG_UART_CONSOLE_INPUT_EXPIRED=y
CONFIG_UART_CONSOLE_INPUT_EXPIRED_TIMEOUT=15000
# CONFIG_RAM_CONSOLE is not set
# CONFIG_RTT_CONSOLE is not set
# CONFIG_IPM_CONSOLE_SENDER is not set
# CONFIG_IPM_CONSOLE_RECEIVER is not set
# CONFIG_UART_MCUMGR is not set
# CONFIG_UART_CONSOLE_LOG_LEVEL_OFF is not set
# CONFIG_UART_CONSOLE_LOG_LEVEL_ERR is not set
# CONFIG_UART_CONSOLE_LOG_LEVEL_WRN is not set
# CONFIG_UART_CONSOLE_LOG_LEVEL_INF is not set
# CONFIG_UART_CONSOLE_LOG_LEVEL_DBG is not set
CONFIG_UART_CONSOLE_LOG_LEVEL_DEFAULT=y
CONFIG_UART_CONSOLE_LOG_LEVEL=3
# CONFIG_GSM_MUX is not set
# CONFIG_EFI_CONSOLE is not set
# CONFIG_COREDUMP_DEVICE is not set
# CONFIG_COUNTER is not set
# CONFIG_CRYPTO is not set
# CONFIG_DAC is not set
# CONFIG_DAI is not set
# CONFIG_DISK_DRIVERS is not set
CONFIG_DISPLAY_INIT_PRIORITY=85
# CONFIG_DISPLAY_LOG_LEVEL_OFF is not set
CONFIG_DISPLAY_LOG_LEVEL_ERR=y
# CONFIG_DISPLAY_LOG_LEVEL_WRN is not set
# CONFIG_DISPLAY_LOG_LEVEL_INF is not set
# CONFIG_DISPLAY_LOG_LEVEL_DBG is not set
# CONFIG_DISPLAY_LOG_LEVEL_DEFAULT is not set
CONFIG_DISPLAY_LOG_LEVEL=1
CONFIG_SSD1306=y
CONFIG_SSD1306_DEFAULT_CONTRAST=128
CONFIG_SSD1306_DEFAULT=y
# CONFIG_SSD1306_SH1106_COMPATIBLE is not set
# CONFIG_SSD1306_REVERSE_MODE is not set
# CONFIG_DUMMY_DISPLAY is not set
# CONFIG_DMA is not set
# CONFIG_EDAC is not set
# CONFIG_EEPROM is not set
# CONFIG_ESPI is not set
# CONFIG_FLASH is not set
# CONFIG_FPGA is not set
# CONFIG_FUEL_GAUGE is not set
# CONFIG_GPIO_LOG_LEVEL_OFF is not set
# CONFIG_GPIO_LOG_LEVEL_ERR is not set
# CONFIG_GPIO_LOG_LEVEL_WRN is not set
# CONFIG_GPIO_LOG_LEVEL_INF is not set
# CONFIG_GPIO_LOG_LEVEL_DBG is not set
CONFIG_GPIO_LOG_LEVEL_DEFAULT=y
CONFIG_GPIO_LOG_LEVEL=3
# CONFIG_GPIO_GET_DIRECTION is not set
# CONFIG_GPIO_GET_CONFIG is not set
# CONFIG_GPIO_HOGS is not set
# CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT is not set
CONFIG_GPIO_NRFX=y
# CONFIG_FXL6408_LOG_LEVEL_OFF is not set
# CONFIG_FXL6408_LOG_LEVEL_ERR is not set
# CONFIG_FXL6408_LOG_LEVEL_WRN is not set
# CONFIG_FXL6408_LOG_LEVEL_INF is not set
# CONFIG_FXL6408_LOG_LEVEL_DBG is not set
CONFIG_FXL6408_LOG_LEVEL_DEFAULT=y
CONFIG_FXL6408_LOG_LEVEL=3
# CONFIG_HWINFO is not set
# CONFIG_I2C_DUMP_MESSAGES is not set
# CONFIG_I2C_CALLBACK is not set
# CONFIG_I2C_TARGET is not set
CONFIG_I2C_NRFX=y
CONFIG_I2C_NRFX_TRANSFER_TIMEOUT=500
CONFIG_I2C_0_NRF_TWI=y
CONFIG_I2C_1_NRF_TWI=y
CONFIG_I2C_INIT_PRIORITY=50
# CONFIG_I2C_LOG_LEVEL_OFF is not set
# CONFIG_I2C_LOG_LEVEL_ERR is not set
# CONFIG_I2C_LOG_LEVEL_WRN is not set
# CONFIG_I2C_LOG_LEVEL_INF is not set
# CONFIG_I2C_LOG_LEVEL_DBG is not set
CONFIG_I2C_LOG_LEVEL_DEFAULT=y
CONFIG_I2C_LOG_LEVEL=3
# CONFIG_I2S is not set
# CONFIG_I3C is not set
# CONFIG_SMBUS is not set

#
# Interrupt controller drivers
#
CONFIG_INTC_INIT_PRIORITY=40
# CONFIG_INTC_LOG_LEVEL_OFF is not set
# CONFIG_INTC_LOG_LEVEL_ERR is not set
# CONFIG_INTC_LOG_LEVEL_WRN is not set
# CONFIG_INTC_LOG_LEVEL_INF is not set
# CONFIG_INTC_LOG_LEVEL_DBG is not set
CONFIG_INTC_LOG_LEVEL_DEFAULT=y
CONFIG_INTC_LOG_LEVEL=3
# CONFIG_MULTI_LEVEL_INTERRUPTS is not set
# CONFIG_INTC_ESP32 is not set
# end of Interrupt controller drivers

# CONFIG_IPM is not set
# CONFIG_LED is not set
# CONFIG_LED_STRIP is not set
# CONFIG_LORA is not set
# CONFIG_MBOX is not set
# CONFIG_MDIO is not set
# CONFIG_MIPI_DSI is not set

#
# Miscellaneous Drivers
#
# CONFIG_GROVE_LCD_RGB is not set
# end of Miscellaneous Drivers

# CONFIG_MM_DRV is not set
# CONFIG_NEURAL_NET_ACCEL is not set
# CONFIG_PCIE is not set
# CONFIG_PCIE_ENDPOINT is not set
# CONFIG_PECI is not set
# CONFIG_PINCTRL_LOG_LEVEL_OFF is not set
# CONFIG_PINCTRL_LOG_LEVEL_ERR is not set
# CONFIG_PINCTRL_LOG_LEVEL_WRN is not set
# CONFIG_PINCTRL_LOG_LEVEL_INF is not set
# CONFIG_PINCTRL_LOG_LEVEL_DBG is not set
CONFIG_PINCTRL_LOG_LEVEL_DEFAULT=y
CONFIG_PINCTRL_LOG_LEVEL=3
CONFIG_PINCTRL_STORE_REG=y
# CONFIG_PINCTRL_DYNAMIC is not set
CONFIG_PINCTRL_NRF=y
# CONFIG_PM_CPU_OPS is not set
# CONFIG_POWER_DOMAIN is not set
# CONFIG_PS2 is not set
# CONFIG_PTP_CLOCK is not set
# CONFIG_PWM is not set
# CONFIG_RETAINED_MEM is not set
# CONFIG_RTC is not set
# CONFIG_SDHC is not set

#
# Capabilities
#
CONFIG_SERIAL_HAS_DRIVER=y
CONFIG_SERIAL_SUPPORT_ASYNC=y
CONFIG_SERIAL_SUPPORT_INTERRUPT=y
# CONFIG_UART_LOG_LEVEL_OFF is not set
# CONFIG_UART_LOG_LEVEL_ERR is not set
# CONFIG_UART_LOG_LEVEL_WRN is not set
# CONFIG_UART_LOG_LEVEL_INF is not set
# CONFIG_UART_LOG_LEVEL_DBG is not set
CONFIG_UART_LOG_LEVEL_DEFAULT=y
CONFIG_UART_LOG_LEVEL=3
CONFIG_UART_USE_RUNTIME_CONFIGURE=y
# CONFIG_UART_ASYNC_API is not set
# CONFIG_UART_LINE_CTRL is not set
# CONFIG_UART_DRV_CMD is not set
# CONFIG_UART_WIDE_DATA is not set
# CONFIG_UART_PIPE is not set

#
# Serial Drivers
#
CONFIG_UART_NRFX=y
CONFIG_UART_0_NRF_UARTE=y
CONFIG_UART_0_ENHANCED_POLL_OUT=y
# CONFIG_UART_0_NRF_PARITY_BIT is not set
CONFIG_UART_0_NRF_TX_BUFFER_SIZE=32
CONFIG_UART_ENHANCED_POLL_OUT=y
CONFIG_NRF_UARTE_PERIPHERAL=y
# CONFIG_SYSCON is not set

#
# Timer drivers
#
# CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME is not set
# CONFIG_SYSTEM_CLOCK_SLOPPY_IDLE is not set
CONFIG_SYSTEM_CLOCK_INIT_PRIORITY=0
CONFIG_TICKLESS_CAPABLE=y
CONFIG_SYSTEM_TIMER_HAS_DISABLE_SUPPORT=y
# CONFIG_NRF_RTC_TIMER_TRIGGER_OVERFLOW is not set
# CONFIG_SYSTEM_CLOCK_NO_WAIT is not set
# CONFIG_SYSTEM_CLOCK_WAIT_FOR_AVAILABILITY is not set
CONFIG_SYSTEM_CLOCK_WAIT_FOR_STABILITY=y
# end of Timer drivers

# CONFIG_USB_BC12 is not set
# CONFIG_UDC_DRIVER is not set
# CONFIG_UVB is not set
# CONFIG_USB_DEVICE_DRIVER is not set
# CONFIG_USBC_TCPC_DRIVER is not set
# CONFIG_USBC_LOG_LEVEL_OFF is not set
# CONFIG_USBC_LOG_LEVEL_ERR is not set
# CONFIG_USBC_LOG_LEVEL_WRN is not set
# CONFIG_USBC_LOG_LEVEL_INF is not set
# CONFIG_USBC_LOG_LEVEL_DBG is not set
CONFIG_USBC_LOG_LEVEL_DEFAULT=y
CONFIG_USBC_LOG_LEVEL=3
# CONFIG_USBC_VBUS_DRIVER is not set
# CONFIG_VIDEO is not set
# CONFIG_VIRTUALIZATION is not set
# CONFIG_W1 is not set
# end of Device Drivers

#
# C Library
#
CONFIG_SUPPORT_MINIMAL_LIBC=y
CONFIG_PICOLIBC_SUPPORTED=y
CONFIG_MINIMAL_LIBC=y
# CONFIG_PICOLIBC is not set
# CONFIG_NEWLIB_LIBC is not set
# CONFIG_EXTERNAL_LIBC is not set
CONFIG_HAS_NEWLIB_LIBC_NANO=y
CONFIG_MINIMAL_LIBC_NON_REENTRANT_FUNCTIONS=y
CONFIG_MINIMAL_LIBC_MALLOC=y
CONFIG_MINIMAL_LIBC_MALLOC_ARENA_SIZE=0
CONFIG_MINIMAL_LIBC_CALLOC=y
CONFIG_MINIMAL_LIBC_REALLOCARRAY=y
# CONFIG_MINIMAL_LIBC_LL_PRINTF is not set
CONFIG_MINIMAL_LIBC_OPTIMIZE_STRING_FOR_SIZE=y
# CONFIG_MINIMAL_LIBC_RAND is not set
CONFIG_MINIMAL_LIBC_TIME=y
# CONFIG_MINIMAL_LIBC_STRING_ERROR_TABLE is not set
CONFIG_STDOUT_CONSOLE=y
CONFIG_NEED_LIBC_MEM_PARTITION=y
# end of C Library

#
# C++ Language Support
#
# CONFIG_CPP is not set

#
# Deprecated
#
# CONFIG_CPLUSPLUS is not set
# CONFIG_LIB_CPLUSPLUS is not set
# end of Deprecated
# end of C++ Language Support

#
# Additional libraries
#

#
# Hash Function Support
#
# CONFIG_SYS_HASH_FUNC32 is not set
# end of Hash Function Support

#
# Hashmap (Hash Table) Support
#
# CONFIG_SYS_HASH_MAP is not set
# end of Hashmap (Hash Table) Support

#
# OS Support Library
#
# CONFIG_JSON_LIBRARY is not set
# CONFIG_RING_BUFFER is not set
CONFIG_NOTIFY=y
# CONFIG_BASE64 is not set
CONFIG_CRC=y
# CONFIG_PRINTK_SYNC is not set
CONFIG_MPSC_PBUF=y
CONFIG_ONOFF=y
# CONFIG_SPSC_PBUF is not set
# CONFIG_SHARED_MULTI_HEAP is not set
# CONFIG_WINSTREAM is not set
# CONFIG_MPSC_CLEAR_ALLOCATED is not set
CONFIG_REBOOT=y
# CONFIG_UTF8 is not set
CONFIG_CBPRINTF_COMPLETE=y
# CONFIG_CBPRINTF_NANO is not set
CONFIG_CBPRINTF_FULL_INTEGRAL=y
# CONFIG_CBPRINTF_REDUCED_INTEGRAL is not set
# CONFIG_CBPRINTF_FP_SUPPORT is not set
# CONFIG_CBPRINTF_FP_A_SUPPORT is not set
# CONFIG_CBPRINTF_FP_ALWAYS_A is not set
CONFIG_CBPRINTF_N_SPECIFIER=y
# CONFIG_CBPRINTF_LIBC_SUBSTS is not set
# CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_OFF is not set
# CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_ERR is not set
# CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_WRN is not set
# CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_INF is not set
# CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_DBG is not set
CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL_DEFAULT=y
CONFIG_CBPRINTF_PACKAGE_LOG_LEVEL=3
# CONFIG_CBPRINTF_PACKAGE_LONGDOUBLE is not set

#
# Heap and Memory Allocation
#
# CONFIG_SYS_HEAP_VALIDATE is not set
CONFIG_SYS_HEAP_ALLOC_LOOPS=3
# CONFIG_SYS_HEAP_RUNTIME_STATS is not set
# CONFIG_SYS_HEAP_LISTENER is not set
CONFIG_SYS_HEAP_SMALL_ONLY=y
# CONFIG_SYS_HEAP_BIG_ONLY is not set
# CONFIG_SYS_HEAP_AUTO is not set
# CONFIG_SYS_MEM_BLOCKS is not set
# end of Heap and Memory Allocation
# end of OS Support Library

# CONFIG_POSIX_API is not set
# CONFIG_POSIX_CLOCK is not set
CONFIG_MAX_TIMER_COUNT=5
CONFIG_TIMER_CREATE_WAIT=100
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_EVENTFD is not set
# CONFIG_FNMATCH is not set
# CONFIG_OPENAMP_RSC_TABLE is not set
# CONFIG_SMF is not set
# end of Additional libraries

#
# Subsystems and OS Services
#
# CONFIG_BT is not set

#
# Controller Area Network (CAN) bus subsystem
#
# CONFIG_ISOTP is not set
# end of Controller Area Network (CAN) bus subsystem

# CONFIG_CONSOLE_SUBSYS is not set

#
# System Monitoring Options
#
# CONFIG_THREAD_ANALYZER is not set
# end of System Monitoring Options

#
# Debugging Options
#
# CONFIG_DEBUG is not set
# CONFIG_STACK_USAGE is not set
# CONFIG_STACK_SENTINEL is not set
CONFIG_PRINTK=y
CONFIG_EARLY_CONSOLE=y
# CONFIG_ASSERT is not set
# CONFIG_FORCE_NO_ASSERT is not set
CONFIG_ASSERT_VERBOSE=y
# CONFIG_ASSERT_NO_FILE_INFO is not set
# CONFIG_ASSERT_NO_COND_INFO is not set
# CONFIG_ASSERT_NO_MSG_INFO is not set
# CONFIG_ASSERT_TEST is not set
# CONFIG_OVERRIDE_FRAME_POINTER_DEFAULT is not set
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_THREAD_INFO is not set
# CONFIG_DEBUG_COREDUMP is not set
# end of Debugging Options

# CONFIG_DISK_ACCESS is not set
# CONFIG_DSP is not set
# CONFIG_EMUL is not set
# CONFIG_CHARACTER_FRAMEBUFFER is not set

#
# File Systems
#
# CONFIG_FILE_SYSTEM is not set
# CONFIG_NVS is not set
# end of File Systems

#
# Inter Processor Communication
#
# CONFIG_RPMSG_SERVICE is not set
# CONFIG_IPC_SERVICE is not set
# end of Inter Processor Communication

# CONFIG_JWT is not set

#
# Logging
#
CONFIG_LOG=y
CONFIG_LOG_CORE_INIT_PRIORITY=0
CONFIG_LOG_MODE_DEFERRED=y
# CONFIG_LOG_MODE_IMMEDIATE is not set
# CONFIG_LOG_MODE_MINIMAL is not set
# CONFIG_LOG_FRONTEND is not set
# CONFIG_LOG_CUSTOM_HEADER is not set
# CONFIG_LOG_MULTIDOMAIN is not set

#
# Logging levels filtering
#
# CONFIG_LOG_RUNTIME_FILTERING is not set
CONFIG_LOG_DEFAULT_LEVEL=3
CONFIG_LOG_OVERRIDE_LEVEL=0
CONFIG_LOG_MAX_LEVEL=4
# end of Logging levels filtering

#
# Processing
#
CONFIG_LOG_PRINTK=y
CONFIG_LOG_MODE_OVERFLOW=y
# CONFIG_LOG_BLOCK_IN_THREAD is not set
CONFIG_LOG_PROCESS_TRIGGER_THRESHOLD=10
CONFIG_LOG_PROCESS_THREAD=y
CONFIG_LOG_PROCESS_THREAD_STARTUP_DELAY_MS=0
CONFIG_LOG_PROCESS_THREAD_SLEEP_MS=1000
CONFIG_LOG_PROCESS_THREAD_STACK_SIZE=768
# CONFIG_LOG_PROCESS_THREAD_CUSTOM_PRIORITY is not set
CONFIG_LOG_TRACE_SHORT_TIMESTAMP=y
# CONFIG_LOG_TIMESTAMP_64BIT is not set
# CONFIG_LOG_SPEED is not set
# end of Processing

#
# Output Formatting
#

#
# Prepend non-hexdump log message with function name
#
# CONFIG_LOG_FUNC_NAME_PREFIX_ERR is not set
# CONFIG_LOG_FUNC_NAME_PREFIX_WRN is not set
# CONFIG_LOG_FUNC_NAME_PREFIX_INF is not set
CONFIG_LOG_FUNC_NAME_PREFIX_DBG=y
# end of Prepend non-hexdump log message with function name

# CONFIG_LOG_MIPI_SYST_ENABLE is not set
# CONFIG_LOG_CUSTOM_FORMAT_SUPPORT is not set
CONFIG_LOG_BACKEND_SHOW_COLOR=y
# CONFIG_LOG_INFO_COLOR_GREEN is not set
CONFIG_LOG_TAG_MAX_LEN=0
CONFIG_LOG_BACKEND_FORMAT_TIMESTAMP=y
# CONFIG_LOG_OUTPUT_FORMAT_LINUX_TIMESTAMP is not set
# CONFIG_LOG_OUTPUT_FORMAT_CUSTOM_TIMESTAMP is not set
# end of Output Formatting

#
# Backends
#
CONFIG_LOG_BACKEND_RTT=y
# CONFIG_LOG_BACKEND_RTT_MODE_DROP is not set
CONFIG_LOG_BACKEND_RTT_MODE_BLOCK=y
# CONFIG_LOG_BACKEND_RTT_MODE_OVERWRITE is not set
CONFIG_LOG_BACKEND_RTT_OUTPUT_TEXT=y
# CONFIG_LOG_BACKEND_RTT_OUTPUT_DICTIONARY is not set
# CONFIG_LOG_BACKEND_RTT_OUTPUT_CUSTOM is not set
CONFIG_LOG_BACKEND_RTT_OUTPUT_DEFAULT=0
CONFIG_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE=16
CONFIG_LOG_BACKEND_RTT_RETRY_CNT=4
CONFIG_LOG_BACKEND_RTT_RETRY_DELAY_MS=5
CONFIG_LOG_BACKEND_RTT_BUFFER=0
# CONFIG_LOG_BACKEND_SWO is not set
CONFIG_LOG_BACKEND_UART=y
CONFIG_LOG_BACKEND_UART_BUFFER_SIZE=1
CONFIG_LOG_BACKEND_UART_AUTOSTART=y
CONFIG_LOG_BACKEND_UART_OUTPUT_TEXT=y
# CONFIG_LOG_BACKEND_UART_OUTPUT_DICTIONARY is not set
# CONFIG_LOG_BACKEND_UART_OUTPUT_CUSTOM is not set
CONFIG_LOG_BACKEND_UART_OUTPUT_DEFAULT=0
# CONFIG_LOG_BACKEND_IPC_SERVICE is not set
# end of Backends

#
# Misc
#
CONFIG_LOG_DOMAIN_ID=0
CONFIG_LOG_USE_VLA=y
# CONFIG_LOG_ALWAYS_RUNTIME is not set
# CONFIG_LOG_FMT_SECTION is not set
# CONFIG_LOG_USE_TAGGED_ARGUMENTS is not set
# CONFIG_LOG_MEM_UTILIZATION is not set
CONFIG_LOG_FAILURE_REPORT_PERIOD=1000
# end of Misc

CONFIG_LOG_OUTPUT=y
# end of Logging

#
# Device Management
#

#
# Host command handler subsystem
#
# CONFIG_EC_HOST_CMD is not set
# CONFIG_EC_HOST_CMD_BACKEND_SHI is not set
# end of Host command handler subsystem

# CONFIG_OSDP is not set
# end of Device Management

# CONFIG_MODBUS is not set

#
# Networking
#
# CONFIG_NET_BUF is not set
# CONFIG_NETWORKING is not set
# end of Networking

#
# Power Management
#
# CONFIG_PM_LOG_LEVEL_OFF is not set
# CONFIG_PM_LOG_LEVEL_ERR is not set
# CONFIG_PM_LOG_LEVEL_WRN is not set
# CONFIG_PM_LOG_LEVEL_INF is not set
# CONFIG_PM_LOG_LEVEL_DBG is not set
CONFIG_PM_LOG_LEVEL_DEFAULT=y
CONFIG_PM_LOG_LEVEL=3
# CONFIG_PM_S2RAM is not set
CONFIG_PM_POLICY_DEFAULT=y
# CONFIG_PM_POLICY_CUSTOM is not set
# end of Power Management

#
# Portability
#
# end of Portability

#
# Random Number Generators
#
# CONFIG_TEST_RANDOM_GENERATOR is not set
# end of Random Number Generators

# CONFIG_RTIO is not set

#
# SD
#
# CONFIG_MMC_STACK is not set
# CONFIG_SDMMC_STACK is not set
# CONFIG_SDIO_STACK is not set
# end of SD

# CONFIG_SETTINGS is not set
# CONFIG_SHELL is not set
# CONFIG_STATS is not set

#
# Storage
#
# CONFIG_STREAM_FLASH is not set
# end of Storage

# CONFIG_TASK_WDT is not set

#
# Testing
#
# CONFIG_ZTEST is not set
# CONFIG_ZTEST_MOCKING is not set
# CONFIG_ZTRESS is not set
# CONFIG_TEST is not set
CONFIG_COVERAGE_GCOV_HEAP_SIZE=16384
# CONFIG_TEST_USERSPACE is not set
# end of Testing

# CONFIG_TIMING_FUNCTIONS is not set
# CONFIG_TRACING is not set
# CONFIG_USB_DEVICE_STACK is not set
# CONFIG_USB_DEVICE_STACK_NEXT is not set
# CONFIG_USB_HOST_STACK is not set
# CONFIG_USBC_STACK is not set
# CONFIG_ZBUS is not set
# end of Subsystems and OS Services

CONFIG_TOOLCHAIN_ZEPHYR_0_16=y
CONFIG_TOOLCHAIN_ZEPHYR_SUPPORTS_THREAD_LOCAL_STORAGE=y

#
# Build and Link Features
#

#
# Linker Options
#
# CONFIG_LINKER_ORPHAN_SECTION_PLACE is not set
CONFIG_LINKER_ORPHAN_SECTION_WARN=y
# CONFIG_LINKER_ORPHAN_SECTION_ERROR is not set
CONFIG_HAS_FLASH_LOAD_OFFSET=y
# CONFIG_USE_DT_CODE_PARTITION is not set
CONFIG_FLASH_LOAD_OFFSET=0
CONFIG_FLASH_LOAD_SIZE=0
CONFIG_LD_LINKER_SCRIPT_SUPPORTED=y
CONFIG_LD_LINKER_TEMPLATE=y
# CONFIG_CMAKE_LINKER_GENERATOR is not set
# CONFIG_HAVE_CUSTOM_LINKER_SCRIPT is not set
CONFIG_KERNEL_ENTRY="__start"
CONFIG_LINKER_SORT_BY_ALIGNMENT=y
CONFIG_SRAM_OFFSET=0

#
# Linker Sections
#
# CONFIG_LINKER_USE_BOOT_SECTION is not set
# CONFIG_LINKER_USE_PINNED_SECTION is not set
CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT=y
CONFIG_LINKER_LAST_SECTION_ID=y
CONFIG_LINKER_LAST_SECTION_ID_PATTERN=0xE015E015
CONFIG_LINKER_USE_RELAX=y
# end of Linker Sections
# end of Linker Options

#
# Compiler Options
#
# CONFIG_CODING_GUIDELINE_CHECK is not set
# CONFIG_NATIVE_APPLICATION is not set
CONFIG_COMPILER_FREESTANDING=y
CONFIG_SIZE_OPTIMIZATIONS=y
# CONFIG_SPEED_OPTIMIZATIONS is not set
# CONFIG_DEBUG_OPTIMIZATIONS is not set
# CONFIG_NO_OPTIMIZATIONS is not set
# CONFIG_COMPILER_WARNINGS_AS_ERRORS is not set
# CONFIG_COMPILER_SAVE_TEMPS is not set
CONFIG_COMPILER_COLOR_DIAGNOSTICS=y
CONFIG_FORTIFY_SOURCE_NONE=y
# CONFIG_FORTIFY_SOURCE_COMPILE_TIME is not set
# CONFIG_FORTIFY_SOURCE_RUN_TIME is not set
CONFIG_COMPILER_OPT=""
# CONFIG_MISRA_SANE is not set
# end of Compiler Options

# CONFIG_ASSERT_ON_ERRORS is not set
# CONFIG_NO_RUNTIME_CHECKS is not set
CONFIG_RUNTIME_ERROR_CHECKS=y

#
# Build Options
#
CONFIG_KERNEL_BIN_NAME="zephyr"
CONFIG_OUTPUT_STAT=y
# CONFIG_OUTPUT_SYMBOLS is not set
CONFIG_OUTPUT_DISASSEMBLY=y
# CONFIG_OUTPUT_DISASSEMBLE_ALL is not set
CONFIG_OUTPUT_PRINT_MEMORY_USAGE=y
# CONFIG_CLEANUP_INTERMEDIATE_FILES is not set
# CONFIG_BUILD_NO_GAP_FILL is not set
CONFIG_BUILD_OUTPUT_BIN=y
# CONFIG_BUILD_OUTPUT_EXE is not set
# CONFIG_BUILD_OUTPUT_S19 is not set
# CONFIG_BUILD_OUTPUT_UF2 is not set
# CONFIG_BUILD_OUTPUT_STRIPPED is not set
# CONFIG_APPLICATION_DEFINED_SYSCALL is not set
# CONFIG_MAKEFILE_EXPORTS is not set
# CONFIG_BUILD_OUTPUT_META is not set
CONFIG_BUILD_OUTPUT_STRIP_PATHS=y
# end of Build Options

CONFIG_WARN_DEPRECATED=y
CONFIG_ENFORCE_ZEPHYR_STDINT=y
# end of Build and Link Features

#
# Boot Options
#
# CONFIG_IS_BOOTLOADER is not set
# CONFIG_BOOTLOADER_BOSSA is not set
# end of Boot Options

#
# Compatibility
#
CONFIG_COMPAT_INCLUDES=y
# end of Compatibility
    build/zephyr/.config

  • 0 in reply to Amank0623

    build/zephyr/zephyr.dts

    # 0 "C:/ncs/v2.4.2/zephyr/misc/empty_file.c"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "C:/ncs/v2.4.2/zephyr/boards/arm/nrf52dk_nrf52832/nrf52dk_nrf52832.dts" 1







/dts-v1/;
# 1 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf52832_qfaa.dtsi" 1 3 4






# 1 "C:/ncs/v2.4.2/zephyr/dts/common/mem.h" 1 3 4
# 8 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf52832_qfaa.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf52832.dtsi" 1 3 4


# 1 "C:/ncs/v2.4.2/zephyr/dts/arm/armv7-m.dtsi" 1 3 4


# 1 "C:/ncs/v2.4.2/zephyr/dts/common/skeleton.dtsi" 1 3 4
# 9 "C:/ncs/v2.4.2/zephyr/dts/common/skeleton.dtsi" 3 4
/ {
 #address-cells = <1>;
 #size-cells = <1>;
 chosen { };
 aliases { };
};
# 4 "C:/ncs/v2.4.2/zephyr/dts/arm/armv7-m.dtsi" 2 3 4

/ {
 soc {
  #address-cells = <1>;
  #size-cells = <1>;
  compatible = "simple-bus";
  interrupt-parent = <&nvic>;
  ranges;

  nvic: interrupt-controller@e000e100 {
   #address-cells = <1>;
   compatible = "arm,v7m-nvic";
   reg = <0xe000e100 0xc00>;
   interrupt-controller;
   #interrupt-cells = <2>;
  };

  systick: timer@e000e010 {
   compatible = "arm,armv7m-systick";
   reg = <0xe000e010 0x10>;
  };
 };
};
# 4 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf52832.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 1 3 4






# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/adc/adc.h" 1 3 4
# 8 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/adc/nrf-adc.h" 1 3 4
# 10 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/adc/nrf-adc.h" 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/dt-util.h" 1 3 4
# 19 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/dt-util.h" 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_macro.h" 1 3 4
# 34 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_macro.h" 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_internal.h" 1 3 4
# 18 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_internal.h" 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_loops.h" 1 3 4
# 19 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
# 35 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_macro.h" 2 3 4
# 20 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/dt-util.h" 2 3 4
# 11 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/adc/nrf-adc.h" 2 3 4
# 9 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/gpio/gpio.h" 1 3 4
# 10 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/i2c/i2c.h" 1 3 4
# 11 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/pinctrl/nrf-pinctrl.h" 1 3 4
# 12 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/pwm/pwm.h" 1 3 4
# 13 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4

# 1 "C:/ncs/v2.4.2/zephyr/dts/common/freq.h" 1 3 4
# 15 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/override.dtsi" 1 3 4
# 16 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 24 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 3 4
/ {
 pinctrl: pin-controller {




  compatible = "nordic,nrf-pinctrl";
 };

 rng_hci: entropy_bt_hci {
  compatible = "zephyr,bt-hci-entropy";
  status = "okay";
 };
};

&systick {




 status = "disabled";
};
# 5 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf52832.dtsi" 2 3 4

/ {
 chosen {
  zephyr,entropy = &rng;
  zephyr,flash-controller = &flash_controller;
 };

 cpus {
  #address-cells = <1>;
  #size-cells = <0>;

  cpu@0 {
   device_type = "cpu";
   compatible = "arm,cortex-m4f";
   reg = <0>;
   #address-cells = <1>;
   #size-cells = <1>;

   itm: itm@e0000000 {
    compatible = "arm,armv7m-itm";
    reg = <0xe0000000 0x1000>;
    swo-ref-frequency = <32000000>;
   };
  };
 };

 soc {
  ficr: ficr@10000000 {
   compatible = "nordic,nrf-ficr";
   reg = <0x10000000 0x1000>;
   status = "okay";
  };

  uicr: uicr@10001000 {
   compatible = "nordic,nrf-uicr";
   reg = <0x10001000 0x1000>;
   status = "okay";
  };

  sram0: memory@20000000 {
   compatible = "mmio-sram";
  };

  clock: clock@40000000 {
   compatible = "nordic,nrf-clock";
   reg = <0x40000000 0x1000>;
   interrupts = <0 1>;
   status = "okay";
  };

  power: power@40000000 {
   compatible = "nordic,nrf-power";
   reg = <0x40000000 0x1000>;
   interrupts = <0 1>;
   status = "okay";
   #address-cells = <1>;
   #size-cells = <1>;

   gpregret1: gpregret1@4000051c {
    compatible = "nordic,nrf-gpregret";
    reg = <0x4000051c 0x1>;
    status = "okay";
   };

   gpregret2: gpregret2@40000520 {
    compatible = "nordic,nrf-gpregret";
    reg = <0x40000520 0x1>;
    status = "okay";
   };
  };

  bprot: bprot@40000000 {
   compatible = "nordic,nrf-bprot";
   reg = <0x40000000 0x1000>;
   status = "okay";
  };

  radio: radio@40001000 {
   compatible = "nordic,nrf-radio";
   reg = <0x40001000 0x1000>;
   interrupts = <1 1>;
   status = "okay";
   ble-2mbps-supported;
  };

  uart0: uart@40002000 {


   compatible = "nordic,nrf-uarte";
   reg = <0x40002000 0x1000>;
   interrupts = <2 1>;
   status = "disabled";
  };

  i2c0: i2c@40003000 {







   compatible = "nordic,nrf-twim";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x40003000 0x1000>;
   clock-frequency = <100000>;
   interrupts = <3 1>;
   status = "disabled";
  };

  spi0: spi@40003000 {







   compatible = "nordic,nrf-spi";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x40003000 0x1000>;
   interrupts = <3 1>;
   max-frequency = <((8) * 1000 * 1000)>;
   easydma-maxcnt-bits = <8>;
   status = "disabled";
  };

  i2c1: i2c@40004000 {







   compatible = "nordic,nrf-twim";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x40004000 0x1000>;
   clock-frequency = <100000>;
   interrupts = <4 1>;
   status = "disabled";
  };

  spi1: spi@40004000 {







   compatible = "nordic,nrf-spi";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x40004000 0x1000>;
   interrupts = <4 1>;
   max-frequency = <((8) * 1000 * 1000)>;
   easydma-maxcnt-bits = <8>;
   status = "disabled";
  };

  nfct: nfct@40005000 {
   compatible = "nordic,nrf-nfct";
   reg = <0x40005000 0x1000>;
   interrupts = <5 1>;
   status = "okay";
  };

  gpiote: gpiote@40006000 {
   compatible = "nordic,nrf-gpiote";
   reg = <0x40006000 0x1000>;
   interrupts = <6 5>;
   status = "disabled";
  };

  adc: adc@40007000 {
   compatible = "nordic,nrf-saadc";
   reg = <0x40007000 0x1000>;
   interrupts = <7 1>;
   status = "disabled";
   #io-channel-cells = <1>;
  };

  timer0: timer@40008000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x40008000 0x1000>;
   cc-num = <4>;
   max-bit-width = <32>;
   interrupts = <8 1>;
   prescaler = <0>;
  };

  timer1: timer@40009000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x40009000 0x1000>;
   cc-num = <4>;
   max-bit-width = <32>;
   interrupts = <9 1>;
   prescaler = <0>;
  };

  timer2: timer@4000a000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x4000a000 0x1000>;
   cc-num = <4>;
   max-bit-width = <32>;
   interrupts = <10 1>;
   prescaler = <0>;
  };

  rtc0: rtc@4000b000 {
   compatible = "nordic,nrf-rtc";
   reg = <0x4000b000 0x1000>;
   cc-num = <3>;
   interrupts = <11 1>;
   status = "disabled";
   clock-frequency = <32768>;
   prescaler = <1>;
  };

  temp: temp@4000c000 {
   compatible = "nordic,nrf-temp";
   reg = <0x4000c000 0x1000>;
   interrupts = <12 1>;
   status = "okay";
  };

  rng: random@4000d000 {
   compatible = "nordic,nrf-rng";
   reg = <0x4000d000 0x1000>;
   interrupts = <13 1>;
   status = "okay";
  };

  ecb: ecb@4000e000 {
   compatible = "nordic,nrf-ecb";
   reg = <0x4000e000 0x1000>;
   interrupts = <14 1>;
   status = "okay";
  };

  ccm: ccm@4000f000 {
   compatible = "nordic,nrf-ccm";
   reg = <0x4000f000 0x1000>;
   interrupts = <15 1>;
   length-field-length-8-bits;
   status = "okay";
  };

  wdt: wdt0: watchdog@40010000 {
   compatible = "nordic,nrf-wdt";
   reg = <0x40010000 0x1000>;
   interrupts = <16 1>;
   status = "okay";
  };

  rtc1: rtc@40011000 {
   compatible = "nordic,nrf-rtc";
   reg = <0x40011000 0x1000>;
   cc-num = <4>;
   interrupts = <17 1>;
   status = "disabled";
   clock-frequency = <32768>;
   prescaler = <1>;
  };

  qdec: qdec0: qdec@40012000 {
   compatible = "nordic,nrf-qdec";
   reg = <0x40012000 0x1000>;
   interrupts = <18 1>;
   status = "disabled";
  };

  comp: comparator@40013000 {






   compatible = "nordic,nrf-comp";
   reg = <0x40013000 0x1000>;
   interrupts = <19 1>;
   status = "disabled";
   #io-channel-cells = <1>;
  };

  egu0: swi0: egu@40014000 {
   compatible = "nordic,nrf-egu", "nordic,nrf-swi";
   reg = <0x40014000 0x1000>;
   interrupts = <20 1>;
   status = "okay";
  };

  egu1: swi1: egu@40015000 {
   compatible = "nordic,nrf-egu", "nordic,nrf-swi";
   reg = <0x40015000 0x1000>;
   interrupts = <21 1>;
   status = "okay";
  };

  egu2: swi2: egu@40016000 {
   compatible = "nordic,nrf-egu", "nordic,nrf-swi";
   reg = <0x40016000 0x1000>;
   interrupts = <22 1>;
   status = "okay";
  };

  egu3: swi3: egu@40017000 {
   compatible = "nordic,nrf-egu", "nordic,nrf-swi";
   reg = <0x40017000 0x1000>;
   interrupts = <23 1>;
   status = "okay";
  };

  egu4: swi4: egu@40018000 {
   compatible = "nordic,nrf-egu", "nordic,nrf-swi";
   reg = <0x40018000 0x1000>;
   interrupts = <24 1>;
   status = "okay";
  };

  egu5: swi5: egu@40019000 {
   compatible = "nordic,nrf-egu", "nordic,nrf-swi";
   reg = <0x40019000 0x1000>;
   interrupts = <25 1>;
   status = "okay";
  };

  timer3: timer@4001a000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x4001a000 0x1000>;
   cc-num = <6>;
   max-bit-width = <32>;
   interrupts = <26 1>;
   prescaler = <0>;
  };

  timer4: timer@4001b000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x4001b000 0x1000>;
   cc-num = <6>;
   max-bit-width = <32>;
   interrupts = <27 1>;
   prescaler = <0>;
  };

  pwm0: pwm@4001c000 {
   compatible = "nordic,nrf-pwm";
   reg = <0x4001c000 0x1000>;
   interrupts = <28 1>;
   status = "disabled";
   #pwm-cells = <3>;
  };

  pdm0: pdm@4001d000 {
   compatible = "nordic,nrf-pdm";
   reg = <0x4001d000 0x1000>;
   interrupts = <29 1>;
   status = "disabled";
  };

  flash_controller: flash-controller@4001e000 {
   compatible = "nordic,nrf52-flash-controller";
   reg = <0x4001e000 0x1000>;

   #address-cells = <1>;
   #size-cells = <1>;


   flash0: flash@0 {
    compatible = "soc-nv-flash";
    erase-block-size = <4096>;
    write-block-size = <4>;
   };
  };

  ppi: ppi@4001f000 {
   compatible = "nordic,nrf-ppi";
   reg = <0x4001f000 0x1000>;
   status = "okay";
  };

  mwu: mwu@40020000 {
   compatible = "nordic,nrf-mwu";
   reg = <0x40020000 0x1000>;
   status = "okay";
  };

  pwm1: pwm@40021000 {
   compatible = "nordic,nrf-pwm";
   reg = <0x40021000 0x1000>;
   interrupts = <33 1>;
   status = "disabled";
   #pwm-cells = <3>;
  };

  pwm2: pwm@40022000 {
   compatible = "nordic,nrf-pwm";
   reg = <0x40022000 0x1000>;
   interrupts = <34 1>;
   status = "disabled";
   #pwm-cells = <3>;
  };

  spi2: spi@40023000 {







   compatible = "nordic,nrf-spi";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x40023000 0x1000>;
   interrupts = <35 1>;
   max-frequency = <((8) * 1000 * 1000)>;
   easydma-maxcnt-bits = <8>;
   status = "disabled";
  };

  rtc2: rtc@40024000 {
   compatible = "nordic,nrf-rtc";
   reg = <0x40024000 0x1000>;
   cc-num = <4>;
   interrupts = <36 1>;
   status = "disabled";
   clock-frequency = <32768>;
   prescaler = <1>;
  };

  i2s0: i2s@40025000 {
   compatible = "nordic,nrf-i2s";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x40025000 0x1000>;
   interrupts = <37 1>;
   status = "disabled";
  };

  gpio0: gpio@50000000 {
   compatible = "nordic,nrf-gpio";
   gpio-controller;
   reg = <0x50000000 0x1000>;
   #gpio-cells = <2>;
   status = "disabled";
   port = <0>;
  };
 };

 sw_pwm: sw-pwm {
  compatible = "nordic,nrf-sw-pwm";
  status = "disabled";
  generator = <&timer2>;
  clock-prescaler = <0>;
  #pwm-cells = <3>;
 };
};

&nvic {
 arm,num-irq-priority-bits = <3>;
};
# 9 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf52832_qfaa.dtsi" 2 3 4

&flash0 {
 reg = <0x00000000 ((512) * 1024)>;
};

&sram0 {
 reg = <0x20000000 ((64) * 1024)>;
};

/ {
 soc {
  compatible = "nordic,nRF52832-QFAA", "nordic,nRF52832", "nordic,nRF52", "simple-bus";
 };
};
# 10 "C:/ncs/v2.4.2/zephyr/boards/arm/nrf52dk_nrf52832/nrf52dk_nrf52832.dts" 2
# 1 "C:/ncs/v2.4.2/zephyr/boards/arm/nrf52dk_nrf52832/nrf52dk_nrf52832-pinctrl.dtsi" 1





 &pinctrl {
    uart0_default: uart0_default {
        group1 {
            psels = <((((((0) * 32U) + (6)) & 0x7FU) << 0U) | ((0U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (8)) & 0x7FU) << 0U) | ((1U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (5)) & 0x7FU) << 0U) | ((2U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (7)) & 0x7FU) << 0U) | ((3U & 0xFFFFU) << 16U))>;
        };
    };

    uart0_sleep: uart0_sleep {
        group1 {
            psels = <((((((0) * 32U) + (6)) & 0x7FU) << 0U) | ((0U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (8)) & 0x7FU) << 0U) | ((1U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (5)) & 0x7FU) << 0U) | ((2U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (7)) & 0x7FU) << 0U) | ((3U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

    i2c0_default: i2c0_default {
        group1 {
            psels = <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((12U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (27)) & 0x7FU) << 0U) | ((11U & 0xFFFFU) << 16U))>;
        };
    };

    i2c0_sleep: i2c0_sleep {
        group1 {
            psels = <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((12U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (27)) & 0x7FU) << 0U) | ((11U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

    i2c1_default: i2c1_default {
        group1 {
            psels = <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((12U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (25)) & 0x7FU) << 0U) | ((11U & 0xFFFFU) << 16U))>;
        };
    };

    i2c1_sleep: i2c1_sleep {
        group1 {
            psels = <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((12U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (25)) & 0x7FU) << 0U) | ((11U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

    pwm0_default: pwm0_default {
        group1 {
            psels = <((((((0) * 32U) + (17)) & 0x7FU) << 0U) | ((22U & 0xFFFFU) << 16U))>;
            nordic,invert;
        };
    };

    pwm0_sleep: pwm0_sleep {
        group1 {
            psels = <((((((0) * 32U) + (17)) & 0x7FU) << 0U) | ((22U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

    spi0_default: spi0_default {
        group1 {
            psels = <((((((0) * 32U) + (27)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (28)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>;
        };
    };

    spi0_sleep: spi0_sleep {
        group1 {
            psels = <((((((0) * 32U) + (27)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (28)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

    spi1_default: spi1_default {
        group1 {
            psels = <((((((0) * 32U) + (31)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (30)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (29)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>;
        };
    };

    spi1_sleep: spi1_sleep {
        group1 {
            psels = <((((((0) * 32U) + (31)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (30)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (29)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

    spi2_default: spi2_default {
        group1 {
            psels = <((((((0) * 32U) + (25)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (23)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (24)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>;
        };
    };

    spi2_sleep: spi2_sleep {
        group1 {
            psels = <((((((0) * 32U) + (25)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (23)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (24)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

};
# 11 "C:/ncs/v2.4.2/zephyr/boards/arm/nrf52dk_nrf52832/nrf52dk_nrf52832.dts" 2

/ {
    model = "Nordic nRF52 DK NRF52832";
    compatible = "nordic,nrf52-dk-nrf52832";

    chosen {
        zephyr,console = &uart0;
        zephyr,shell-uart = &uart0;
        zephyr,uart-mcumgr = &uart0;
        zephyr,bt-mon-uart = &uart0;
        zephyr,bt-c2h-uart = &uart0;
        zephyr,sram = &sram0;
        zephyr,flash = &flash0;
        zephyr,code-partition = &slot0_partition;
    };

    leds {
        compatible = "gpio-leds";
        led0: led_0 {
            gpios = <&gpio0 17 (1 << 0)>;
            label = "Green LED 0";
        };
        led1: led_1 {
            gpios = <&gpio0 18 (0 << 0)>;
            label = "Green LED 1";
        };
        led2: led_2 {
            gpios = <&gpio0 19 (0 << 0)>;
            label = "Green LED 2";
        };
        led3: led_3 {
            gpios = <&gpio0 20 (0 << 0)>;
            label = "Green LED 3";
        };
    };

    pwmleds {
        compatible = "pwm-leds";
        pwm_led0: pwm_led_0 {
            pwms = <&pwm0 0 (((20) * 1000UL) * 1000UL) (1 << 0)>;
        };
    };

    buttons {
        compatible = "gpio-keys";
        button0: button_0 {
            gpios = <&gpio0 13 ((1 << 4) | (1 << 0))>;
            label = "Push button switch 0";
        };
        button1: button_1 {
            gpios = <&gpio0 14 ((1 << 4) | (1 << 0))>;
            label = "Push button switch 1";
        };
        button2: button_2 {
            gpios = <&gpio0 15 ((1 << 4) | (1 << 0))>;
            label = "Push button switch 2";
        };
        button3: button_3 {
            gpios = <&gpio0 16 ((1 << 4) | (1 << 0))>;
            label = "Push button switch 3";
        };
    };

    arduino_header: connector {
        compatible = "arduino-header-r3";
        #gpio-cells = <2>;
        gpio-map-mask = <0xffffffff 0xffffffc0>;
        gpio-map-pass-thru = <0 0x3f>;
        gpio-map = <0 0 &gpio0 3 0>,
                   <1 0 &gpio0 4 0>,
                   <2 0 &gpio0 28 0>,
                   <3 0 &gpio0 29 0>,
                   <4 0 &gpio0 30 0>,
                   <5 0 &gpio0 31 0>,
                   <6 0 &gpio0 11 0>,
                   <7 0 &gpio0 12 0>,
                   <8 0 &gpio0 13 0>,
                   <9 0 &gpio0 14 0>,
                   <10 0 &gpio0 15 0>,
                   <11 0 &gpio0 16 0>,
                   <12 0 &gpio0 17 0>,
                   <13 0 &gpio0 18 0>,
                   <14 0 &gpio0 19 0>,
                   <15 0 &gpio0 20 0>,
                   <16 0 &gpio0 22 0>,
                   <17 0 &gpio0 23 0>,
                   <18 0 &gpio0 24 0>,
                   <19 0 &gpio0 25 0>,
                   <20 0 &gpio0 26 0>,
                   <21 0 &gpio0 27 0>;
    };

    arduino_adc: analog-connector {
        compatible = "arduino,uno-adc";
        #io-channel-cells = <1>;
        io-channel-map = <0 &adc 1>,
                         <1 &adc 2>,
                         <2 &adc 4>,
                         <3 &adc 5>,
                         <4 &adc 6>,
                         <5 &adc 7>;
    };


    aliases {
        led0 = &led0;
        led1 = &led1;
        led2 = &led2;
        led3 = &led3;
        pwm-led0 = &pwm_led0;
        sw0 = &button0;
        sw1 = &button1;
        sw2 = &button2;
        sw3 = &button3;
        bootloader-led0 = &led0;
        mcuboot-button0 = &button0;
        mcuboot-led0 = &led0;
        watchdog0 = &wdt0;
    };
};



&adc {
    status = "okay";
};

&gpiote {
    status = "okay";
};

&gpio0 {
    status = "okay";
};

arduino_serial: &uart0 {
    status = "okay";
    compatible = "nordic,nrf-uarte";
    current-speed = <115200>;
    pinctrl-0 = <&uart0_default>;
    pinctrl-1 = <&uart0_sleep>;
    pinctrl-names = "default", "sleep";
};

arduino_i2c: &i2c1 {
    compatible = "nordic,nrf-twi";
    status = "okay";
    pinctrl-0 = <&i2c1_default>;
    pinctrl-1 = <&i2c1_sleep>;
    pinctrl-names = "default", "sleep";
};

&i2c1 {
    compatible = "nordic,nrf-twi";


    pinctrl-0 = <&i2c1_default>;
    pinctrl-1 = <&i2c1_sleep>;
    pinctrl-names = "default", "sleep";
};

&pwm0 {
    status = "okay";
    pinctrl-0 = <&pwm0_default>;
    pinctrl-1 = <&pwm0_sleep>;
    pinctrl-names = "default", "sleep";
};

&spi0 {
    compatible = "nordic,nrf-spi";


    pinctrl-0 = <&spi0_default>;
    pinctrl-1 = <&spi0_sleep>;
    pinctrl-names = "default", "sleep";
};

&spi1 {
    compatible = "nordic,nrf-spi";
    status = "okay";
    pinctrl-0 = <&spi1_default>;
    pinctrl-1 = <&spi1_sleep>;
    pinctrl-names = "default", "sleep";
};


arduino_spi: &spi2 {
    compatible = "nordic,nrf-spi";
    status = "okay";
    cs-gpios = <&arduino_header 16 (1 << 0)>;
    pinctrl-0 = <&spi2_default>;
    pinctrl-1 = <&spi2_sleep>;
    pinctrl-names = "default", "sleep";
};

&flash0 {

    partitions {
        compatible = "fixed-partitions";
        #address-cells = <1>;
        #size-cells = <1>;

        boot_partition: partition@0 {
            label = "mcuboot";
            reg = <0x00000000 0xc000>;
        };
        slot0_partition: partition@c000 {
            label = "image-0";
            reg = <0x0000C000 0x32000>;
        };
        slot1_partition: partition@3e000 {
            label = "image-1";
            reg = <0x0003E000 0x32000>;
        };
        scratch_partition: partition@70000 {
            label = "image-scratch";
            reg = <0x00070000 0xa000>;
        };
        storage_partition: partition@7a000 {
            label = "storage";
            reg = <0x0007a000 0x00006000>;
        };
    };
};
# 0 "<command-line>" 2
# 1 "C:/ncs/v2.4.2/zephyr/boards/shields/ssd1306/ssd1306_128x64.overlay" 1






&arduino_i2c {
    status = "okay";
    compatible = "nordic,nrf-twi";


    ssd1306@3c {
            compatible = "solomon,ssd1306fb";
            reg = <0x3c>;
            label = "SSD1306";
            width = <128>;
            height = <64>;
            segment-offset = <0>;
            page-offset = <0>;
            display-offset = <0>;
            multiplex-ratio = <63>;
            segment-remap;
            com-invdir;
            prechargep = <0x22>;
    };
};
# 0 "<command-line>" 2
# 1 "c:/ncs/v2.4.2/zephyr/samples/subsys/display/lvgl/nrf52dk_nrf52832.overlay" 1
&pinctrl {
    i2c0_default: i2c0_default {
        group1 {
            psels = <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((12U & 0xFFFFU) << 16U))>,
            <((((((0) * 32U) + (27)) & 0x7FU) << 0U) | ((11U & 0xFFFFU) << 16U))>;
        };
    };

    i2c0_sleep: i2c0_sleep {
        group1 {
            psels = <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((12U & 0xFFFFU) << 16U))>,
            <((((((0) * 32U) + (27)) & 0x7FU) << 0U) | ((11U & 0xFFFFU) << 16U))>;
        };
    };
};

&i2c0 {
    compatible = "nordic,nrf-twi";
    status = "okay";
    pinctrl-0 = <&i2c0_default>;
    pinctrl-1 = <&i2c0_sleep>;
    pinctrl-names = "default", "sleep";


    ssd1306: ssd1306@3c {
        compatible = "solomon,ssd1306fb";
        reg = <0x3C>;
        label = "SSD1306";
        height = <64>;
        width = <128>;
        segment-offset = <0>;
        page-offset = <0>;
        display-offset = <0>;
        multiplex-ratio = <63>;
        prechargep = <0x22>;
        com-invdir;
        segment-remap;
    };
};

/ {
 chosen {
  zephyr,display = &ssd1306;
 };
};
# 0 "<command-line>" 2
# 1 "C:/ncs/v2.4.2/zephyr/misc/empty_file.c"

Reply
  • 0 in reply to Amank0623

    build/zephyr/zephyr.dts

    # 0 "C:/ncs/v2.4.2/zephyr/misc/empty_file.c"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "C:/ncs/v2.4.2/zephyr/boards/arm/nrf52dk_nrf52832/nrf52dk_nrf52832.dts" 1







/dts-v1/;
# 1 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf52832_qfaa.dtsi" 1 3 4






# 1 "C:/ncs/v2.4.2/zephyr/dts/common/mem.h" 1 3 4
# 8 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf52832_qfaa.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf52832.dtsi" 1 3 4


# 1 "C:/ncs/v2.4.2/zephyr/dts/arm/armv7-m.dtsi" 1 3 4


# 1 "C:/ncs/v2.4.2/zephyr/dts/common/skeleton.dtsi" 1 3 4
# 9 "C:/ncs/v2.4.2/zephyr/dts/common/skeleton.dtsi" 3 4
/ {
 #address-cells = <1>;
 #size-cells = <1>;
 chosen { };
 aliases { };
};
# 4 "C:/ncs/v2.4.2/zephyr/dts/arm/armv7-m.dtsi" 2 3 4

/ {
 soc {
  #address-cells = <1>;
  #size-cells = <1>;
  compatible = "simple-bus";
  interrupt-parent = <&nvic>;
  ranges;

  nvic: interrupt-controller@e000e100 {
   #address-cells = <1>;
   compatible = "arm,v7m-nvic";
   reg = <0xe000e100 0xc00>;
   interrupt-controller;
   #interrupt-cells = <2>;
  };

  systick: timer@e000e010 {
   compatible = "arm,armv7m-systick";
   reg = <0xe000e010 0x10>;
  };
 };
};
# 4 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf52832.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 1 3 4






# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/adc/adc.h" 1 3 4
# 8 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/adc/nrf-adc.h" 1 3 4
# 10 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/adc/nrf-adc.h" 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/dt-util.h" 1 3 4
# 19 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/dt-util.h" 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_macro.h" 1 3 4
# 34 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_macro.h" 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_internal.h" 1 3 4
# 18 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_internal.h" 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_loops.h" 1 3 4
# 19 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
# 35 "C:/ncs/v2.4.2/zephyr/include/zephyr/sys/util_macro.h" 2 3 4
# 20 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/dt-util.h" 2 3 4
# 11 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/adc/nrf-adc.h" 2 3 4
# 9 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/gpio/gpio.h" 1 3 4
# 10 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/i2c/i2c.h" 1 3 4
# 11 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/pinctrl/nrf-pinctrl.h" 1 3 4
# 12 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/include/zephyr/dt-bindings/pwm/pwm.h" 1 3 4
# 13 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4

# 1 "C:/ncs/v2.4.2/zephyr/dts/common/freq.h" 1 3 4
# 15 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 1 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/override.dtsi" 1 3 4
# 16 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 2 3 4
# 24 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf_common.dtsi" 3 4
/ {
 pinctrl: pin-controller {




  compatible = "nordic,nrf-pinctrl";
 };

 rng_hci: entropy_bt_hci {
  compatible = "zephyr,bt-hci-entropy";
  status = "okay";
 };
};

&systick {




 status = "disabled";
};
# 5 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf52832.dtsi" 2 3 4

/ {
 chosen {
  zephyr,entropy = &rng;
  zephyr,flash-controller = &flash_controller;
 };

 cpus {
  #address-cells = <1>;
  #size-cells = <0>;

  cpu@0 {
   device_type = "cpu";
   compatible = "arm,cortex-m4f";
   reg = <0>;
   #address-cells = <1>;
   #size-cells = <1>;

   itm: itm@e0000000 {
    compatible = "arm,armv7m-itm";
    reg = <0xe0000000 0x1000>;
    swo-ref-frequency = <32000000>;
   };
  };
 };

 soc {
  ficr: ficr@10000000 {
   compatible = "nordic,nrf-ficr";
   reg = <0x10000000 0x1000>;
   status = "okay";
  };

  uicr: uicr@10001000 {
   compatible = "nordic,nrf-uicr";
   reg = <0x10001000 0x1000>;
   status = "okay";
  };

  sram0: memory@20000000 {
   compatible = "mmio-sram";
  };

  clock: clock@40000000 {
   compatible = "nordic,nrf-clock";
   reg = <0x40000000 0x1000>;
   interrupts = <0 1>;
   status = "okay";
  };

  power: power@40000000 {
   compatible = "nordic,nrf-power";
   reg = <0x40000000 0x1000>;
   interrupts = <0 1>;
   status = "okay";
   #address-cells = <1>;
   #size-cells = <1>;

   gpregret1: gpregret1@4000051c {
    compatible = "nordic,nrf-gpregret";
    reg = <0x4000051c 0x1>;
    status = "okay";
   };

   gpregret2: gpregret2@40000520 {
    compatible = "nordic,nrf-gpregret";
    reg = <0x40000520 0x1>;
    status = "okay";
   };
  };

  bprot: bprot@40000000 {
   compatible = "nordic,nrf-bprot";
   reg = <0x40000000 0x1000>;
   status = "okay";
  };

  radio: radio@40001000 {
   compatible = "nordic,nrf-radio";
   reg = <0x40001000 0x1000>;
   interrupts = <1 1>;
   status = "okay";
   ble-2mbps-supported;
  };

  uart0: uart@40002000 {


   compatible = "nordic,nrf-uarte";
   reg = <0x40002000 0x1000>;
   interrupts = <2 1>;
   status = "disabled";
  };

  i2c0: i2c@40003000 {







   compatible = "nordic,nrf-twim";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x40003000 0x1000>;
   clock-frequency = <100000>;
   interrupts = <3 1>;
   status = "disabled";
  };

  spi0: spi@40003000 {







   compatible = "nordic,nrf-spi";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x40003000 0x1000>;
   interrupts = <3 1>;
   max-frequency = <((8) * 1000 * 1000)>;
   easydma-maxcnt-bits = <8>;
   status = "disabled";
  };

  i2c1: i2c@40004000 {







   compatible = "nordic,nrf-twim";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x40004000 0x1000>;
   clock-frequency = <100000>;
   interrupts = <4 1>;
   status = "disabled";
  };

  spi1: spi@40004000 {







   compatible = "nordic,nrf-spi";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x40004000 0x1000>;
   interrupts = <4 1>;
   max-frequency = <((8) * 1000 * 1000)>;
   easydma-maxcnt-bits = <8>;
   status = "disabled";
  };

  nfct: nfct@40005000 {
   compatible = "nordic,nrf-nfct";
   reg = <0x40005000 0x1000>;
   interrupts = <5 1>;
   status = "okay";
  };

  gpiote: gpiote@40006000 {
   compatible = "nordic,nrf-gpiote";
   reg = <0x40006000 0x1000>;
   interrupts = <6 5>;
   status = "disabled";
  };

  adc: adc@40007000 {
   compatible = "nordic,nrf-saadc";
   reg = <0x40007000 0x1000>;
   interrupts = <7 1>;
   status = "disabled";
   #io-channel-cells = <1>;
  };

  timer0: timer@40008000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x40008000 0x1000>;
   cc-num = <4>;
   max-bit-width = <32>;
   interrupts = <8 1>;
   prescaler = <0>;
  };

  timer1: timer@40009000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x40009000 0x1000>;
   cc-num = <4>;
   max-bit-width = <32>;
   interrupts = <9 1>;
   prescaler = <0>;
  };

  timer2: timer@4000a000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x4000a000 0x1000>;
   cc-num = <4>;
   max-bit-width = <32>;
   interrupts = <10 1>;
   prescaler = <0>;
  };

  rtc0: rtc@4000b000 {
   compatible = "nordic,nrf-rtc";
   reg = <0x4000b000 0x1000>;
   cc-num = <3>;
   interrupts = <11 1>;
   status = "disabled";
   clock-frequency = <32768>;
   prescaler = <1>;
  };

  temp: temp@4000c000 {
   compatible = "nordic,nrf-temp";
   reg = <0x4000c000 0x1000>;
   interrupts = <12 1>;
   status = "okay";
  };

  rng: random@4000d000 {
   compatible = "nordic,nrf-rng";
   reg = <0x4000d000 0x1000>;
   interrupts = <13 1>;
   status = "okay";
  };

  ecb: ecb@4000e000 {
   compatible = "nordic,nrf-ecb";
   reg = <0x4000e000 0x1000>;
   interrupts = <14 1>;
   status = "okay";
  };

  ccm: ccm@4000f000 {
   compatible = "nordic,nrf-ccm";
   reg = <0x4000f000 0x1000>;
   interrupts = <15 1>;
   length-field-length-8-bits;
   status = "okay";
  };

  wdt: wdt0: watchdog@40010000 {
   compatible = "nordic,nrf-wdt";
   reg = <0x40010000 0x1000>;
   interrupts = <16 1>;
   status = "okay";
  };

  rtc1: rtc@40011000 {
   compatible = "nordic,nrf-rtc";
   reg = <0x40011000 0x1000>;
   cc-num = <4>;
   interrupts = <17 1>;
   status = "disabled";
   clock-frequency = <32768>;
   prescaler = <1>;
  };

  qdec: qdec0: qdec@40012000 {
   compatible = "nordic,nrf-qdec";
   reg = <0x40012000 0x1000>;
   interrupts = <18 1>;
   status = "disabled";
  };

  comp: comparator@40013000 {






   compatible = "nordic,nrf-comp";
   reg = <0x40013000 0x1000>;
   interrupts = <19 1>;
   status = "disabled";
   #io-channel-cells = <1>;
  };

  egu0: swi0: egu@40014000 {
   compatible = "nordic,nrf-egu", "nordic,nrf-swi";
   reg = <0x40014000 0x1000>;
   interrupts = <20 1>;
   status = "okay";
  };

  egu1: swi1: egu@40015000 {
   compatible = "nordic,nrf-egu", "nordic,nrf-swi";
   reg = <0x40015000 0x1000>;
   interrupts = <21 1>;
   status = "okay";
  };

  egu2: swi2: egu@40016000 {
   compatible = "nordic,nrf-egu", "nordic,nrf-swi";
   reg = <0x40016000 0x1000>;
   interrupts = <22 1>;
   status = "okay";
  };

  egu3: swi3: egu@40017000 {
   compatible = "nordic,nrf-egu", "nordic,nrf-swi";
   reg = <0x40017000 0x1000>;
   interrupts = <23 1>;
   status = "okay";
  };

  egu4: swi4: egu@40018000 {
   compatible = "nordic,nrf-egu", "nordic,nrf-swi";
   reg = <0x40018000 0x1000>;
   interrupts = <24 1>;
   status = "okay";
  };

  egu5: swi5: egu@40019000 {
   compatible = "nordic,nrf-egu", "nordic,nrf-swi";
   reg = <0x40019000 0x1000>;
   interrupts = <25 1>;
   status = "okay";
  };

  timer3: timer@4001a000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x4001a000 0x1000>;
   cc-num = <6>;
   max-bit-width = <32>;
   interrupts = <26 1>;
   prescaler = <0>;
  };

  timer4: timer@4001b000 {
   compatible = "nordic,nrf-timer";
   status = "disabled";
   reg = <0x4001b000 0x1000>;
   cc-num = <6>;
   max-bit-width = <32>;
   interrupts = <27 1>;
   prescaler = <0>;
  };

  pwm0: pwm@4001c000 {
   compatible = "nordic,nrf-pwm";
   reg = <0x4001c000 0x1000>;
   interrupts = <28 1>;
   status = "disabled";
   #pwm-cells = <3>;
  };

  pdm0: pdm@4001d000 {
   compatible = "nordic,nrf-pdm";
   reg = <0x4001d000 0x1000>;
   interrupts = <29 1>;
   status = "disabled";
  };

  flash_controller: flash-controller@4001e000 {
   compatible = "nordic,nrf52-flash-controller";
   reg = <0x4001e000 0x1000>;

   #address-cells = <1>;
   #size-cells = <1>;


   flash0: flash@0 {
    compatible = "soc-nv-flash";
    erase-block-size = <4096>;
    write-block-size = <4>;
   };
  };

  ppi: ppi@4001f000 {
   compatible = "nordic,nrf-ppi";
   reg = <0x4001f000 0x1000>;
   status = "okay";
  };

  mwu: mwu@40020000 {
   compatible = "nordic,nrf-mwu";
   reg = <0x40020000 0x1000>;
   status = "okay";
  };

  pwm1: pwm@40021000 {
   compatible = "nordic,nrf-pwm";
   reg = <0x40021000 0x1000>;
   interrupts = <33 1>;
   status = "disabled";
   #pwm-cells = <3>;
  };

  pwm2: pwm@40022000 {
   compatible = "nordic,nrf-pwm";
   reg = <0x40022000 0x1000>;
   interrupts = <34 1>;
   status = "disabled";
   #pwm-cells = <3>;
  };

  spi2: spi@40023000 {







   compatible = "nordic,nrf-spi";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x40023000 0x1000>;
   interrupts = <35 1>;
   max-frequency = <((8) * 1000 * 1000)>;
   easydma-maxcnt-bits = <8>;
   status = "disabled";
  };

  rtc2: rtc@40024000 {
   compatible = "nordic,nrf-rtc";
   reg = <0x40024000 0x1000>;
   cc-num = <4>;
   interrupts = <36 1>;
   status = "disabled";
   clock-frequency = <32768>;
   prescaler = <1>;
  };

  i2s0: i2s@40025000 {
   compatible = "nordic,nrf-i2s";
   #address-cells = <1>;
   #size-cells = <0>;
   reg = <0x40025000 0x1000>;
   interrupts = <37 1>;
   status = "disabled";
  };

  gpio0: gpio@50000000 {
   compatible = "nordic,nrf-gpio";
   gpio-controller;
   reg = <0x50000000 0x1000>;
   #gpio-cells = <2>;
   status = "disabled";
   port = <0>;
  };
 };

 sw_pwm: sw-pwm {
  compatible = "nordic,nrf-sw-pwm";
  status = "disabled";
  generator = <&timer2>;
  clock-prescaler = <0>;
  #pwm-cells = <3>;
 };
};

&nvic {
 arm,num-irq-priority-bits = <3>;
};
# 9 "C:/ncs/v2.4.2/zephyr/dts/arm/nordic/nrf52832_qfaa.dtsi" 2 3 4

&flash0 {
 reg = <0x00000000 ((512) * 1024)>;
};

&sram0 {
 reg = <0x20000000 ((64) * 1024)>;
};

/ {
 soc {
  compatible = "nordic,nRF52832-QFAA", "nordic,nRF52832", "nordic,nRF52", "simple-bus";
 };
};
# 10 "C:/ncs/v2.4.2/zephyr/boards/arm/nrf52dk_nrf52832/nrf52dk_nrf52832.dts" 2
# 1 "C:/ncs/v2.4.2/zephyr/boards/arm/nrf52dk_nrf52832/nrf52dk_nrf52832-pinctrl.dtsi" 1





 &pinctrl {
    uart0_default: uart0_default {
        group1 {
            psels = <((((((0) * 32U) + (6)) & 0x7FU) << 0U) | ((0U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (8)) & 0x7FU) << 0U) | ((1U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (5)) & 0x7FU) << 0U) | ((2U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (7)) & 0x7FU) << 0U) | ((3U & 0xFFFFU) << 16U))>;
        };
    };

    uart0_sleep: uart0_sleep {
        group1 {
            psels = <((((((0) * 32U) + (6)) & 0x7FU) << 0U) | ((0U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (8)) & 0x7FU) << 0U) | ((1U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (5)) & 0x7FU) << 0U) | ((2U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (7)) & 0x7FU) << 0U) | ((3U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

    i2c0_default: i2c0_default {
        group1 {
            psels = <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((12U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (27)) & 0x7FU) << 0U) | ((11U & 0xFFFFU) << 16U))>;
        };
    };

    i2c0_sleep: i2c0_sleep {
        group1 {
            psels = <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((12U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (27)) & 0x7FU) << 0U) | ((11U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

    i2c1_default: i2c1_default {
        group1 {
            psels = <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((12U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (25)) & 0x7FU) << 0U) | ((11U & 0xFFFFU) << 16U))>;
        };
    };

    i2c1_sleep: i2c1_sleep {
        group1 {
            psels = <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((12U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (25)) & 0x7FU) << 0U) | ((11U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

    pwm0_default: pwm0_default {
        group1 {
            psels = <((((((0) * 32U) + (17)) & 0x7FU) << 0U) | ((22U & 0xFFFFU) << 16U))>;
            nordic,invert;
        };
    };

    pwm0_sleep: pwm0_sleep {
        group1 {
            psels = <((((((0) * 32U) + (17)) & 0x7FU) << 0U) | ((22U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

    spi0_default: spi0_default {
        group1 {
            psels = <((((((0) * 32U) + (27)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (28)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>;
        };
    };

    spi0_sleep: spi0_sleep {
        group1 {
            psels = <((((((0) * 32U) + (27)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (28)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

    spi1_default: spi1_default {
        group1 {
            psels = <((((((0) * 32U) + (31)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (30)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (29)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>;
        };
    };

    spi1_sleep: spi1_sleep {
        group1 {
            psels = <((((((0) * 32U) + (31)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (30)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (29)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

    spi2_default: spi2_default {
        group1 {
            psels = <((((((0) * 32U) + (25)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (23)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (24)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>;
        };
    };

    spi2_sleep: spi2_sleep {
        group1 {
            psels = <((((((0) * 32U) + (25)) & 0x7FU) << 0U) | ((4U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (23)) & 0x7FU) << 0U) | ((5U & 0xFFFFU) << 16U))>,
                <((((((0) * 32U) + (24)) & 0x7FU) << 0U) | ((6U & 0xFFFFU) << 16U))>;
            low-power-enable;
        };
    };

};
# 11 "C:/ncs/v2.4.2/zephyr/boards/arm/nrf52dk_nrf52832/nrf52dk_nrf52832.dts" 2

/ {
    model = "Nordic nRF52 DK NRF52832";
    compatible = "nordic,nrf52-dk-nrf52832";

    chosen {
        zephyr,console = &uart0;
        zephyr,shell-uart = &uart0;
        zephyr,uart-mcumgr = &uart0;
        zephyr,bt-mon-uart = &uart0;
        zephyr,bt-c2h-uart = &uart0;
        zephyr,sram = &sram0;
        zephyr,flash = &flash0;
        zephyr,code-partition = &slot0_partition;
    };

    leds {
        compatible = "gpio-leds";
        led0: led_0 {
            gpios = <&gpio0 17 (1 << 0)>;
            label = "Green LED 0";
        };
        led1: led_1 {
            gpios = <&gpio0 18 (0 << 0)>;
            label = "Green LED 1";
        };
        led2: led_2 {
            gpios = <&gpio0 19 (0 << 0)>;
            label = "Green LED 2";
        };
        led3: led_3 {
            gpios = <&gpio0 20 (0 << 0)>;
            label = "Green LED 3";
        };
    };

    pwmleds {
        compatible = "pwm-leds";
        pwm_led0: pwm_led_0 {
            pwms = <&pwm0 0 (((20) * 1000UL) * 1000UL) (1 << 0)>;
        };
    };

    buttons {
        compatible = "gpio-keys";
        button0: button_0 {
            gpios = <&gpio0 13 ((1 << 4) | (1 << 0))>;
            label = "Push button switch 0";
        };
        button1: button_1 {
            gpios = <&gpio0 14 ((1 << 4) | (1 << 0))>;
            label = "Push button switch 1";
        };
        button2: button_2 {
            gpios = <&gpio0 15 ((1 << 4) | (1 << 0))>;
            label = "Push button switch 2";
        };
        button3: button_3 {
            gpios = <&gpio0 16 ((1 << 4) | (1 << 0))>;
            label = "Push button switch 3";
        };
    };

    arduino_header: connector {
        compatible = "arduino-header-r3";
        #gpio-cells = <2>;
        gpio-map-mask = <0xffffffff 0xffffffc0>;
        gpio-map-pass-thru = <0 0x3f>;
        gpio-map = <0 0 &gpio0 3 0>,
                   <1 0 &gpio0 4 0>,
                   <2 0 &gpio0 28 0>,
                   <3 0 &gpio0 29 0>,
                   <4 0 &gpio0 30 0>,
                   <5 0 &gpio0 31 0>,
                   <6 0 &gpio0 11 0>,
                   <7 0 &gpio0 12 0>,
                   <8 0 &gpio0 13 0>,
                   <9 0 &gpio0 14 0>,
                   <10 0 &gpio0 15 0>,
                   <11 0 &gpio0 16 0>,
                   <12 0 &gpio0 17 0>,
                   <13 0 &gpio0 18 0>,
                   <14 0 &gpio0 19 0>,
                   <15 0 &gpio0 20 0>,
                   <16 0 &gpio0 22 0>,
                   <17 0 &gpio0 23 0>,
                   <18 0 &gpio0 24 0>,
                   <19 0 &gpio0 25 0>,
                   <20 0 &gpio0 26 0>,
                   <21 0 &gpio0 27 0>;
    };

    arduino_adc: analog-connector {
        compatible = "arduino,uno-adc";
        #io-channel-cells = <1>;
        io-channel-map = <0 &adc 1>,
                         <1 &adc 2>,
                         <2 &adc 4>,
                         <3 &adc 5>,
                         <4 &adc 6>,
                         <5 &adc 7>;
    };


    aliases {
        led0 = &led0;
        led1 = &led1;
        led2 = &led2;
        led3 = &led3;
        pwm-led0 = &pwm_led0;
        sw0 = &button0;
        sw1 = &button1;
        sw2 = &button2;
        sw3 = &button3;
        bootloader-led0 = &led0;
        mcuboot-button0 = &button0;
        mcuboot-led0 = &led0;
        watchdog0 = &wdt0;
    };
};



&adc {
    status = "okay";
};

&gpiote {
    status = "okay";
};

&gpio0 {
    status = "okay";
};

arduino_serial: &uart0 {
    status = "okay";
    compatible = "nordic,nrf-uarte";
    current-speed = <115200>;
    pinctrl-0 = <&uart0_default>;
    pinctrl-1 = <&uart0_sleep>;
    pinctrl-names = "default", "sleep";
};

arduino_i2c: &i2c1 {
    compatible = "nordic,nrf-twi";
    status = "okay";
    pinctrl-0 = <&i2c1_default>;
    pinctrl-1 = <&i2c1_sleep>;
    pinctrl-names = "default", "sleep";
};

&i2c1 {
    compatible = "nordic,nrf-twi";


    pinctrl-0 = <&i2c1_default>;
    pinctrl-1 = <&i2c1_sleep>;
    pinctrl-names = "default", "sleep";
};

&pwm0 {
    status = "okay";
    pinctrl-0 = <&pwm0_default>;
    pinctrl-1 = <&pwm0_sleep>;
    pinctrl-names = "default", "sleep";
};

&spi0 {
    compatible = "nordic,nrf-spi";


    pinctrl-0 = <&spi0_default>;
    pinctrl-1 = <&spi0_sleep>;
    pinctrl-names = "default", "sleep";
};

&spi1 {
    compatible = "nordic,nrf-spi";
    status = "okay";
    pinctrl-0 = <&spi1_default>;
    pinctrl-1 = <&spi1_sleep>;
    pinctrl-names = "default", "sleep";
};


arduino_spi: &spi2 {
    compatible = "nordic,nrf-spi";
    status = "okay";
    cs-gpios = <&arduino_header 16 (1 << 0)>;
    pinctrl-0 = <&spi2_default>;
    pinctrl-1 = <&spi2_sleep>;
    pinctrl-names = "default", "sleep";
};

&flash0 {

    partitions {
        compatible = "fixed-partitions";
        #address-cells = <1>;
        #size-cells = <1>;

        boot_partition: partition@0 {
            label = "mcuboot";
            reg = <0x00000000 0xc000>;
        };
        slot0_partition: partition@c000 {
            label = "image-0";
            reg = <0x0000C000 0x32000>;
        };
        slot1_partition: partition@3e000 {
            label = "image-1";
            reg = <0x0003E000 0x32000>;
        };
        scratch_partition: partition@70000 {
            label = "image-scratch";
            reg = <0x00070000 0xa000>;
        };
        storage_partition: partition@7a000 {
            label = "storage";
            reg = <0x0007a000 0x00006000>;
        };
    };
};
# 0 "<command-line>" 2
# 1 "C:/ncs/v2.4.2/zephyr/boards/shields/ssd1306/ssd1306_128x64.overlay" 1






&arduino_i2c {
    status = "okay";
    compatible = "nordic,nrf-twi";


    ssd1306@3c {
            compatible = "solomon,ssd1306fb";
            reg = <0x3c>;
            label = "SSD1306";
            width = <128>;
            height = <64>;
            segment-offset = <0>;
            page-offset = <0>;
            display-offset = <0>;
            multiplex-ratio = <63>;
            segment-remap;
            com-invdir;
            prechargep = <0x22>;
    };
};
# 0 "<command-line>" 2
# 1 "c:/ncs/v2.4.2/zephyr/samples/subsys/display/lvgl/nrf52dk_nrf52832.overlay" 1
&pinctrl {
    i2c0_default: i2c0_default {
        group1 {
            psels = <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((12U & 0xFFFFU) << 16U))>,
            <((((((0) * 32U) + (27)) & 0x7FU) << 0U) | ((11U & 0xFFFFU) << 16U))>;
        };
    };

    i2c0_sleep: i2c0_sleep {
        group1 {
            psels = <((((((0) * 32U) + (26)) & 0x7FU) << 0U) | ((12U & 0xFFFFU) << 16U))>,
            <((((((0) * 32U) + (27)) & 0x7FU) << 0U) | ((11U & 0xFFFFU) << 16U))>;
        };
    };
};

&i2c0 {
    compatible = "nordic,nrf-twi";
    status = "okay";
    pinctrl-0 = <&i2c0_default>;
    pinctrl-1 = <&i2c0_sleep>;
    pinctrl-names = "default", "sleep";


    ssd1306: ssd1306@3c {
        compatible = "solomon,ssd1306fb";
        reg = <0x3C>;
        label = "SSD1306";
        height = <64>;
        width = <128>;
        segment-offset = <0>;
        page-offset = <0>;
        display-offset = <0>;
        multiplex-ratio = <63>;
        prechargep = <0x22>;
        com-invdir;
        segment-remap;
    };
};

/ {
 chosen {
  zephyr,display = &ssd1306;
 };
};
# 0 "<command-line>" 2
# 1 "C:/ncs/v2.4.2/zephyr/misc/empty_file.c"

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