Multiple QSPI devices with nRF54H20

[alexandre_duch]

Hello,

The nRF40H20 has two Chip Select pins for the QSPI interface (P6.03, P6.13).
We would like to use the first one for an external memory (MX25R6435FZNIL0) with XIP and the second for another NAND memory (MX35UF2G24AD).

Can you confirm if ncs v2.8.0 supports multiple QSPI devices, one of which uses XIP?

Best regards,

Alexandre

[Simonr]

Hi Alexandre

The EXMIF (external memory inferface) has 8 data lines and 2 chip select pins indeed, so what you're describing should indeed be possible. I had a short discussion with one of the devs, and the QSPI/EXMIF support in NCS 2.8.0 is very experimental at best but more support, at least for XIP, is scheduled. You can get more details on when that is by contacting the sales representative of your area.

Do you have some more details on what your use case is exactly, then we might be able to provide some more detailed support here.

Best regards,

Simon

[alexandre_duch]

Hi Simon,

We plan to use only 4 data lines for the external NOR flash memory MX25R6435F and the NAND memory MX35UF2G24AD.

The NOR memory, (same as the one on the nRF5340-DK), will be configured in XIP mode to extend the application memory, primarily for OTA partitions, Wi-Fi coex with nRF7002 via high-speed SPI, and LVGL.

The NAND memory is intended for USB/mass storage, accessed through a filesystem.

Rather than connecting the NAND memory via SPI, we are considering the option of sharing the QSPI interface to reduce pin usage and enhance mass storage access speeds.

Do you see any limitations with this approach?
Is the use of QSPI/XIP with this NOR memory in 4-data-line mode still considered experimental?

Thank you for your answer.

Best regards,
Alexandre