SPI and UART configurations

[Jamal_nRF]

Dear Customer Support,

Reaching out for help / example on couple peripheral configurations

We are using nRF Connect 2.5.0

1-UART

we have the following configuration

   uart1_default: uart1_default {

      group1 {

         psels = <NRF_PSEL(UART_TX, 0, 20)>,

                 <NRF_PSEL(UART_RTS, 0, 21)>;

      };

      group2 {

         psels = <NRF_PSEL(UART_RX, 0, 22)>,

                 <NRF_PSEL(UART_CTS, 0, 23)>;

         bias-pull-down;

      };

   };

we want to configure the TX line P0.20 to be OPEN_DRAIN

The way it is done today is by re-defining P0.20 in the .dts file as a GPIO, and that works

Wondering if they is a better way to embed to OPEN_DRAIN configuration within the uart1_default configuration

-SPI

we are trying to configure a pull down on the the MISO line

we currently use the following configuration

&spi1 {

   compatible = "nordic,nrf-spi";

   status = "okay";

   pinctrl-0 = <&spi1_default>;

   pinctrl-1 = <&spi1_sleep>;

   pinctrl-names = "default", "sleep";

we tried adding this property as documented here

https://docs.zephyrproject.org/2.5.0/reference/devicetree/bindings/nordic,nrf-spi.html?highlight=miso%20pull%20up

by adding this property

miso-pull-down

Unfortunately, we get this compile error

devicetree error: 'miso-pull-down' appears in /soc/spi@40004000 in C:/GitAV/AutoVentive/application/build_P1/zephyr/zephyr.dts.pre, but is not declared in 'properties:' in C:/GitAV/AutoVentive/external/zephyr/dts/bindings\spi\nordic,nrf-spi.yaml

Please advise how to proceed...

Thank you

[Hieu]

Hi Jamal_nRF,

Once again my apology for my previous unhelpful replies. I have not touched this topic for far too long and clearly my knowledge has developed severe holes.

True open drain is not possible with the nRF52840, and you can only achieve a quasi-open-drain configuration by disabling all bias/pulls and setting drive mode to S0D1.
Below is how you can configure that in DeviceTree:

&uart1_default {

    group1 {

        psels = <NRF_PSEL(UART_TX, 0, 20)>;

        bias-disable;

        nordic,drive-mode = <NRF_DRIVE_S0D1>;

    };

    group2 {

        psels = <NRF_PSEL(UART_RTS, 0, 21)>;

    };

    group3 {

        psels = <NRF_PSEL(UART_RX, 0, 22)>,

            <NRF_PSEL(UART_CTS, 0, 23)>;

        bias-pull-down;

    };

};

Without a bias property, there is no bias by default, so bias-disable is optional.

Note that not while P0.20, which you chose for UART_TX, can support S0D1, not all pins can. 
Refer to the Pin Assignment section of the Product Specification for more information.

Please refer to these cases for more information on limitation of the quasi open drain configuration.

https://devzone.nordicsemi.com/f/nordic-q-a/28373/nrf52810-open-drain-gpio
https://devzone.nordicsemi.com/f/nordic-q-a/40629/nrf52840-open-drain-gpio

Hieu

[Jamal_nRF]

Hello Hieu,

Your recommendation on group1 / UART-TX configuration seems to provide desirable outcome.

We are in the process of testing on multiple test boards to assess stability...

Will back to you later today if any more questions...

[Jamal_nRF]

Update: your recommendation is working on multiple test boards as expected.

Thank you for your good support

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