nRF5340 UART TX always high

I'm working with a custom board using an nRF5340 and NCS v2.7.0. The UART3 peripheral is connected to an ISOW1412 isolated transceiver and is configured with RX assigned to P0.22 and TX to P0.20 (the other UART peripheral addresses are being used by other devices). For right now, all I'm trying to do is perform some sanity checks to verify that there aren't any critical board mistakes, so I'm using part of the source code from the UART lesson of the nRF Connect Fundamentals course just to transmit 2 test bytes (shown below for reference).

	/* STEP 8 - Register the UART callback function */
	ret = uart_callback_set(uart, uart_cb, NULL);
	if (ret) {
		return 1;
	}
	/* STEP 9.2 - Send the data over UART by calling uart_tx() */
	ret = uart_tx(uart, tx_buf, sizeof(tx_buf), SYS_FOREVER_MS);
	if (ret) {
		return 1;
	}

The project builds and runs fine, but anytime I attempt to transmit data, I've noticed that the TX line is never pulled down. My callback gets called for the UART_TX_DONE event, so I'm not sure what or where the issue is.

Some additional information:

- UART2 is currently being used for logging. When switching UART2 and UART3 (so UART2 connects to transceiver and UART3 is used for logging), the board behaves in the exact same manner -  logging works normally, and now the TX line of UART2 is held high. This leads me to believe the issue is not with the specific UART instance.

- When I configure the TX pin (P0.20) as GPIO output, I'm able to manually pull it down, so I'm also lead to believe that this isn't a hardware issue.

- Explicitly enabling NRFX_UARTE3 in my prj.conf had no effect (I don't know if this is important/relevant).

Is there something I'm missing?

Any assistance is greatly appreciated!

Parents
  • Hello Amira,

    Could you please share these?
    - The schematic of your custom board and the transceiver
    - The compiled application zephyr.dts file

    Hieu

  • Hi Hieu, 

    Here is the portion of the MCU connecting to the transceiver:

    And here are the corresponding connections at the transceiver:

    There are no other components connected to these nets. The complete design is propietary, so I'm afraid I can't share anymore of it, but hopefully this is sufficient! Also I forgot to mention, I'm using Fanstel's BT40E module (datasheet) for the nRF5340. 

    I'm also limited in what I can share from my application, is there a portion of the .dts file that you're looking for?

    Thank you for your help!

  • Hi Amira,

    I just want to check if the schematic or the Devicetree has any issues that can explain your observation. It really is quite strange.

    Could you tell me how you check the pin logic level? Your tests otherwise seem quite thorough, and the conclusions are reasonable, considering the result.

    If necessary and if that is good with you, we can make this case private and we can look into your project files then.

    Hieu

  • Hi Hieu,

    I broke out the R and D pins on the transceiver and have been monitoring the pin levels with an oscilloscope, and I've been checking the other pins just using a multimeter. Typicallly I'd prefer to break out the MCU pins but this module has LGA packaging, so the pins aren't accessible.

    Switching to a private case would be great so I can share my project files. Should I close this ticket and open a private one or is there a way to make this one private?

    Thank you!

Reply
  • Hi Hieu,

    I broke out the R and D pins on the transceiver and have been monitoring the pin levels with an oscilloscope, and I've been checking the other pins just using a multimeter. Typicallly I'd prefer to break out the MCU pins but this module has LGA packaging, so the pins aren't accessible.

    Switching to a private case would be great so I can share my project files. Should I close this ticket and open a private one or is there a way to make this one private?

    Thank you!

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