OTP allocation for NSIB

In the documentation for the secure bootloader, it's mentioned that the provisioning data gets stored in OTP memory for some chips (e.g. nRF5340). Is there a way to know what portion or address space of the OTP will be used by the bootloader?

The current project I'm working on, using the nRF5340, requires roughly 40-48B of OTP for manufacturer-specific data. Is there a way to ensure that these datasets will not overlap and corrupt one another? 

Thank you!

  • Amira R. said:
    I'm not using TF-M for this project, does the SPU alignment rule still apply? All my other static partitions are aligned by page size.

    Yes, the page granularity is still something you need to consider for the devices

    Amira R. said:
    Also "provision" and "factory_data_otp" are not the only defined static partitions, but they're the only partitions in the "otp" region. Would partitions in other regions affect these partitions? 

    Any region that may have addresses overlapping could affect any other region

    Kind regards,
    Andreas

  • Hi Andreas,

    Thank you for getting back to me.

    Since TF-M is not being used, I'll assume that partitions only need to be aligned by erase page size (0x1000), which is the case at the container level.

    I'm attaching my partition file here if you don't mind checking for errors - I don't think partitions are overlapping, but perhaps I'm missing something.

    b0:
      address: 0x0
      end_address: 0x8000
      placement:
        after: start
      region: flash_primary
      size: 0x8000
      
    b0_container:
      address: 0x0
      span: [ b0 ]
      size: 0x8000
    
    # B0 Provision Data stored in OTP for nRF5340
    provision:
      address: 0xff8180
      end_address: 0xff8400
      region: otp
      size: 0x280
    
    s0_pad:
      address: 0x8000
      end_address: 0x8200
      placement:
        after: b0_container
        align: { start: 0x1000 }
      region: flash_primary
      size: 0x200
      share_size: 
      - mcuboot_pad
    s0_image:
      address: 0x8200
      span: [ mcuboot ]
      size: 0x4e00
    
    mcuboot:
      address: 0x8200
      end_address: 0xd000
      inside: [ s0_image ]
      placement:
        after: s0_pad
      region: flash_primary
      size: 0x4e00
    
    s0:
      address: 0x8000
      span: [ s0_pad, s0_image ]
      size: 0x5000
    
    s1_pad:
      address: 0xd000
      end_address: 0xd200
      placement:
        after: s0
        align: { start: 0x1000 }
      region: flash_primary
      share_size:
      - mcuboot_pad
      size: 0x200
    s1_image:
      address: 0xd200
      end_address: 0x12000
      placement:
        after: s1_pad
      region: flash_primary
      share_size:
      - mcuboot
      size: 0x4e00
    
    s1:
      address: 0xd000
      span: [ s1_pad, s1_image ]
      size: 0x5000
    
    mcuboot_pad:
      address: 0x12000
      end_address: 0x12200
      placement:
        after: s1
        align: { start: 0x1000 }
      region: flash_primary
      size: 0x200
    mcuboot_primary_app:
      address: 0x12200
      span: [ app ]
      size: 0xeae00
    
    app:
      address: 0x12200
      placement: 
        after: 
      inside: [ mcuboot_primary_app ]
      region: flash_primary
      size: 0xeae00
    
    mcuboot_primary:
      address: 0x12000
      span: [ mcuboot_pad, app ]
      size: 0xeb000
    
    # Device settings (app NVS)
    project_settings:
      address: 0xfd000
      end_address: 0xfe000
      placement:
        after: mcuboot_primary_app
      region: flash_primary
      size: 0x1000
    settings_storage:
      address: 0xfe000
      end_address: 0x100000
      placement:
        after: project_settings
      region: flash_primary
      size: 0x2000
    factory_data_otp:
      address: 0xff8100
      end_address: 0xff8180
      placement:
        before: provision
      region: otp
      size: 0x80
    
    # Shared RAM for network core
    pcd_sram:
      address: 0x20000000
      region: sram_primary
      size: 0x2000
    mcuboot_primary_1:
      address: 0x0
      device: flash_ctrl
      region: ram_flash
      size: 0x40000
    
    # External Flash
    mcuboot_secondary:
      address: 0x0
      device: HUB_EXTERNAL_FLASH_A
      region: external_flash
      size: 0xeb000
    mcuboot_secondary_1:
      address: 0xeb000
      device: HUB_EXTERNAL_FLASH_A
      region: external_flash
      size: 0x40000
    data_partition:
      address: 0x12b000
      device: HUB_EXTERNAL_FLASH_A
      region: external_flash
      size: 0x1ff000
    sub_image_1:
      address: 0x32a000
      device: HUB_EXTERNAL_FLASH_A
      region: external_flash
      size: 0x8000
    sub_image_2:
      address: 0x332000
      device: HUB_EXTERNAL_FLASH_A
      region: external_flash
      size: 0x65000
    sub_image_3:
      address: 0x397000
      device: HUB_EXTERNAL_FLASH_A
      region: external_flash
      size: 0x7000
    external_flash:
      address: 0x39e000
      device: HUB_EXTERNAL_FLASH_A
      region: external_flash
      size: 0x462000
      
    

    Thank you!

  • Amira R. said:
    0x1000)

    0x1000 = 4k, so this looks good for the nRF5340

    Amira R. said:
    I'm attaching my partition file here if you don't mind checking for errors

    I can't see anything very obvious, so the best here would be to try it and see if it results in either negative spaces or you not being able to write to the uicr/otp partitions you're attempting to set up

    Kind regards,
    Andreas

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