spi_nor: Device id 00 ef aa does not match config ef aa 22

[Mike Zhao]

my PCB board uses nRF9161 SiP. The flash chip is W25N02KVZEIR.

on the PCB board, here are the wiring to spi flash chip,

P0.26 to CS#, P0.27 to CLK, P0.28 to MOSI, P0.29 to MOSO, P0.30 to WP# and P0.31 to HOLD#.

I created the build configuration based on nRF9161DK_nRD9161_ns.  For the detail, please check the attached zip file. 

After I did pristine build and flash the firmware to the board, I got this running error as below,

*************************

[00:00:00.250,152] [0m<dbg> os: setup_thread_stack: stack 0x20001d80 for thread 0x20000798: obj_size=1024 buf_start=0x20001d80 buf_size 1024 stack_ptr=0x20002180[0m
[00:00:00.250,183] [0m<dbg> os: setup_thread_stack: stack 0x20001c40 for thread 0x20000718: obj_size=320 buf_start=0x20001c40 buf_size 320 stack_ptr=0x20001d80[0m
[00:00:00.250,213] [0m<dbg> clock_control: clkstarted_handle: lfclk: Clock started[0m
[00:00:00.250,244] [0m<dbg> os: setup_thread_stack: stack 0x20001140 for thread 0x20000238: obj_size=768 buf_start=0x20001140 buf_size 768 stack_ptr=0x20001440[0m
[00:00:00.250,366] [0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x200020a8 - rx_bufs 0x200020b0 - 1[0m
[00:00:00.250,396] [0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x200020b8 (2), current_rx 0x200020b8 (2), tx buf/len 0x200020a0/1, rx buf/len 0x200020a0/1[0m
[00:00:00.250,457] [0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x200020ef/1[0m
[00:00:00.250,457] [0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x200020ef/1[0m
[00:00:00.250,518] [0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0/0[0m
[00:00:00.250,518] [0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0/0[0m
[00:00:00.250,549] [0m<dbg> spi_nrfx_spim: finish_transaction: Transaction finished with status 0[0m
[00:00:00.250,610] [0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: tx_bufs 0x200020c0 - rx_bufs 0x200020c8 - 1[0m
[00:00:00.250,610] [0m<dbg> spi_nrfx_spim: spi_context_buffers_setup: current_tx 0x200020d0 (2), current_rx 0x200020d0 (2), tx buf/len 0x200020b8/1, rx buf/len 0x200020b8/1[0m
[00:00:00.250,671] [0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0x20002104/3[0m
[00:00:00.250,701] [0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0x20002104/3[0m
[00:00:00.250,762] [0m<dbg> spi_nrfx_spim: spi_context_update_tx: tx buf/len 0/0[0m
[00:00:00.250,762] [0m<dbg> spi_nrfx_spim: spi_context_update_rx: rx buf/len 0/0[0m
[00:00:00.250,793] [0m<dbg> spi_nrfx_spim: finish_transaction: Transaction finished with status 0[0m
[00:00:00.250,823] [1;31m<err> spi_nor: Device id 00 ef aa does not match config ef aa 22[0m
*** Booting nRF Connect SDK v3.0.0-3bfc46578e42 ***
*** Using Zephyr OS v4.0.99-a0e545cb437a ***
[00:00:00.250,915] [0m<dbg> os: k_sched_unlock: scheduler unlocked (0x20000798:0)[0m
***** Hub SPI flash tester version: 1.0.4 ****
--- SPI Flash Verification Started ---
ERROR: Flash device 'W25N02KV' is not ready.

************************

The error is "spi_nor: Device id 00 ef aa does not match config ef aa 22". Somehow, the manufacturer ID is wrong. 

I wrote the separte testing firmware to check all spi flash chip control pins from P0.26 to P0.31. All these pins works properly and the signal is very clean. The spi flash chip and nRF9161 SiP chip are powered by 3.3V. The power source is very clean on Osiloscope. 

Do you have any idea why I cannot get the correct manufacturer id? anything wrong in my configurations or the c codes?

test_spi_flash1.zip

[Håkon Alseth]

Hi,

 

nRF9161DK_nRD9161_ns

If you use the board nrf9161dk/nrf9161, ie. the secure image of the board, does it work as expected then?

If yes, then I suspect there's a pinconflict between tfm and the non-secure app, which is usually the uart:

CONFIG_TFM_SECURE_UART=n
CONFIG_TFM_LOG_LEVEL_SILENCE=y

 

The error is "spi_nor: Device id 00 ef aa does not match config ef aa 22". Somehow, the manufacturer ID is wrong. 

I do not know how this exact flash behaves, as I do not have it, but it might be that it boots up in a standby or sleep state?

Try adding DPD parameters, like done here:

https://github.com/zephyrproject-rtos/zephyr//blob/main/boards/nordic/nrf9151dk/nrf9151dk_nrf9151_common.dtsi#L211-L213

 

Kind regards,

Håkon

 

[Mike Zhao]

I run the spi flash sample firmware on nRF9161DK board without problem. I am able to read, write and erase the gd25wb256 NOR flash chip.

Follow your suggestion, I added the following 3 lines to my app.overlay file and did pristine build to the sample project. Flash the firmware to my customize board. The problem is same. 

has-dpd;
t-enter-dpd = <3000>;
t-exit-dpd = <40000>;

*** <err> spi_nor: Device id 00 ef aa does not match config ef aa 22

From this error message, it seems that the code is able to read 3 bytes data from flash chip(W25N02KV), just the first byte is incorrect. 

Do you have any other advice?

[Håkon Alseth]

Hi,

 

How do you build your board? Is it based on "nrf9161dk/nrf9161" board? If so, the UARTs are used for your pins:

P0.26 to CS#, P0.27 to CLK, P0.28 to MOSI, P0.29 to MOSO, P0.30 to WP# and P0.31 to HOLD#.

This means that any multi-image build must also have these uart's either redefined or disabled.

 

Did you try this?

Håkon Alseth said:

If you use the board nrf9161dk/nrf9161, ie. the secure image of the board, does it work as expected then?

 

Kind regards,

Håkon

[Mike Zhao]

Hi Hakon, 

Thanks for your quick response. 

As what you mentioned above, I also tried to add the following 2 lines to my prj.conf file, but the testing result is same. The firmware is still not able to read the manufacturer ID properly. 

CONFIG_TFM_SECURE_UART=n
CONFIG_TFM_LOG_LEVEL_SILENCE=y

I config my board based on nRF9161DK_nRF9161_ns. For the detail, you can check test_spi_flash.zip which I uploaded early.

In my overlay file, I disabled the following devices,

******

&spi3 {

    status = "disabled";

};

&uart0 {

    status = "disabled";

};

&uart1 {

    status = "disabled";

};

&uart2 {

    status = "disabled";

};

&i2c2 {

    status = "disabled";

};

******

I also redefined uart3 as following,

    uart3_default: uart3_default {

        group1 {

            psels = <NRF_PSEL(UART_TX, 0, 4)>, <NRF_PSEL(UART_RX, 0, 5)>;

        };

    };

So, it should not have conflict configuration to P0.26 to CS#, P0.27 to CLK, P0.28 to MOSI, P0.29 to MOSO, P0.30 to WP# and P0.31 to HOLD#.

Do you have any advice?

[Håkon Alseth]

Hi,

 

Have you scoped the SPI pins to see if they behave as expected, ie. correspond with the log output?

Can you please share what changes you've done to the board files?

 

Kind regards,

Håkon