i2S SCLK and LRCK nRF52832 DK

[worldsnexthero]

Any updates on this from anyone? Please advise

Hi,

The i2S microphone that I am using requires a over sampling rate fixed at 64 therefore the WS signal (LRCLK on nrf52) must be BCLK/64 and therefore synchronized to the BCLK (SCLK on nrf52). This translates to valid BCLK frequencies from 2.048MHz to 4.096MHz and sampling rates from 32kHz to 64kHz, respectively.

The data format is I2S, 24 bit, 2's complement.

My question is, how do I obtain these frequencies with the nrf52832 DK?

The rules for the SCLK and LRCLK on nRF52 are as follows:

1. LRCK = MCK/CONFIG.RATIO
2. SCK = 2 * LRCK * CONFIG.SWIDTH
3. CONFIG.RATIO/(2 * SWIDTH) needs to be an integer

Since 2 * CONFIG.SWIDTH = 2 * 24 = 48, equation (2) becomes SCK = 48 * LRCK. Based on our requirements, we want this ratio to be 64.

Any insights on how to make this work?

Thanks.

[Morten]

Possible duplicate of this question?

[Greg Tomasch]

Hello All,

I think there is a work-around of sorts now that addresses the issues experienced here... Almost all 24-bit I2S microphones output 24 data bits per stereo channel but require 32 SCK pulses per channel to function properly. So, the stereo I2S frame needs to be 64 SCK pulses wide. Like everyone else, I was attempting to collect audio data from a modern 24-bit I2S MEMS microphone and ran into the hard-coded limitation of 48 SCK pulses per stereo I2S frame in I2S master mode. The I2S frame will never be 64 SCK pulses wide In master mode but in I2S slave mode the nRF52 will properly decode the 24 data bits per channel even if the the frame is 64 SCK pulses wide. After reading the I2S protocol spec, It dawned on me that there really is precious little difference between I2S master and slave modes... Just where the LRCK and SCK pulses come from.

My solution was to augment the PWM library to set the PWM carrier period directly in 16MHz ticks, not milliseconds. So I use two PWM channels; one to generate SCK and the other to generate LRCK and connect the PWM outputs to the I2S SCK and LRCK pins. I set the LRCK PWM channel period to be 64X that of the SCK PWM chanel period. I have a functioning peripheral application for SDK 13.0.0 and the pca10040 DK board located here:

github.com/.../nRF52_24-bit-_I2S_Microphone_Audio_Recording_Utility

I was using the Invensense ICS43432 microphone. There is a sample ".wav" audio file that demonstrates typical audio quality....

This may be considered as an ugly work-around but it does work and doesn't require any other external devices to generate the clock signals...

Best Regards, Greg Tomasch