64-bit floating point

Question

Hi, 
 I have a few questions about using floating point in nRF5 chips. As discussed here , nRF51 has no FPU but we can simply use "float" in Keil and have the operations in software. 
 1- Besides power and speed, what is the advantage of using FPU? In terms of accuracy is there any difference between a 32-bit float in FPU and in software? 
 2- How can we enable/disable FPU in nRF52? any example projects? 
 3- Is nRF52 capable of doing IEEE-754 64-bit operations? For our case, software or FPU doesn't matter, just going to 64-bit is important. If yes, how can I define a 64-bit float? 
 I'm using nRF52-DK, SDK11, SD132 in Keil. 
 Thanks,
FA

Håkon Alseth · Accepted Answer

Hi, 
 The difference between doing float manipulation with and without FPU enabled is quite huge.
I did a test with CMSIS-DPS fft example (\CMSIS\DSP_Lib\Examples\arm_fft_bin_example\ARM) a while back, and the difference is huge. Also note that there's a fft example now in SDK v12 (I have not benchmarked that one). 
 Compiled in Keil, all with -O3 optimization. 
 nRF51x22 : 198 ms 
nRF52832 w/o FPU :40.8 ms 
nRF52832 w/FPU : 2.84 ms
 
 You will definitely benefit from tuning on the FPU if you're doing double/float operations. 
 To answer your questions: 
 
 
 Besides power/speed when performing a single-precision operation, no change. 
 
 
 most examples have FPU enabled by default on the nRF52832. In keil, you set this in your project settings under "Target -> Floating point hardware" drop-down menu. Similar setting in IAR settings (Under the Target section).
With GCC, the FPU is set under CFLAGS and LDFLAGS with "-mfloat-abi=hard -mfpu=fpv4-sp-d16" 
 
 
 The FPU in the nRF52 is a component that is "included" in the ARM M4F core that we have licensed from ARM. According to ARM, it is not fully compliant with IEEE 754 (only for Single Precision): infocenter.arm.com/.../index.jsp 
 infocenter.arm.com/.../index.jsp 
 
 
 
 The FPU provides floating-point
computation functionality that is
compliant with the ANSI/IEEE Std
754-2008, IEEE Standard for Binary
Floating-Point Arithmetic, referred to
as the IEEE 754 standard. The FPU
contains 32 single-precision extension
registers, which you can also access
as 16 doubleword registers for load,
store, and move operations. 
 
 edit: 
Oh, almost forgot. a 64-bit float is a "double", and is of type "float64_t" (which is just typedef'ed from a double). 
 Cheers,
Håkon

64-bit floating point

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