Random SPI data shifting at ~72kB/s throughput

[Musa]

Hello,

I am using nRF52 with ADS1292, and i am trying to sample at 8kHz with data throughput of 72kB/s, but some data is being randomly shifted giving me random spikes. This occurs on all available clock speeds to some degree. I am using Easy DMA. I am not getting any warnings or errors from the SPI driver as far as I can tell.

This issue does not occur at a lower data rate. Does this have something to do with overhead from the nRF SPIM drivers? I am also using I2C and other resources, but this also occurs with those additional resources disabled.

I'm trying to figure out what the limitation here is; is there a known limit on how many times you can call 'nrf_drv_spi_transfer' every second?

Thanks,

[Musa]

I'll see if my department has an available logic analyzer. I think the problem improves slightly with less resource usage but the issue is still there. I do have EasyDMA enabled. Do you think it would help for me to share the code i am using? The ADS1292 can generate a 1-Hz test signal so that a predictable output can be observed. I also tried shorting the inputs, for a ~0V measurement.

Thanks

[MartinBL]

What kind of SPI clock frequency do you use? If I read the datasheet correctly maximum frequency is ~2MHz. If you go faster I suppose it is possible to get garbage bad data.

I think the input capacitance on the ADS1292 at 20pF is also relatively high. It might be worth a shot to configure the SPI pins in high drive to be able to source more current. You can do it by writing this after you call nrf_drv_spi_init():

nrf_gpio_cfg(p_config->sck_pin,
             NRF_GPIO_PIN_DIR_OUTPUT,
             NRF_GPIO_PIN_INPUT_CONNECT,
             NRF_GPIO_PIN_NOPULL,
             NRF_GPIO_PIN_H0H1,
             NRF_GPIO_PIN_NOSENSE);

If it still doesn't work, I think it could be interesting to see your code and PCB layout. You can upload it in confidence on our official support portal, MyPage if you prefer.

[Constantin]

I face the same issue that at higher sample rate the SPI communication is somehow shifted. My guess is that between the Interrupt from the DRDY pin is not directly executed with Softdevice enabled. Due to this issue the data inside the shift register at the ADS is already shifted one byte further sometimes and therefore read out erronous. Is there somehow a way to enable SPI communication without delay or directly by the DMA controller, like in the example here

https://github.com/Martinsbl/nrf5-mpu-examples/tree/master/nrf52-mpu-easydma-using-gpiote-and-registers

[MartinBL]

PPI is perfect for this. You can prepare the SPI in advance and then use GPIOTE to start an SPI transfer on a DRDY signal from your slave. The SPI can then transfer one or more data sets directly to RAM using EasyDMA and finally, you can process the data on e.g. a SPI END event. 

[Constantin]

Hi Martin,

I've just checked my code and tried with optimization off and on and both produce significant different results:

1. Without optim there is a lot of jitter for 4 kHz (20 times a second) and the time between data ready interrupt and SPI CS goes to LOW is about 60 usec and jitters a lot.

2. With optim1 there is much less jitter for the 4 kHz only once each 10 sec and the time between data ready interrupt and SPI CS goes to LOW is about 25 usec and jitters less.

The data_ready handler looks like this:

void drdy_handler(nrf_drv_gpiote_pin_t pin, nrf_gpiote_polarity_t action)
{
    nrf_spi_mngr_schedule(&m_nrf_spi_mngr, &read_transaction);
}

So there is not much to optimize. The transaction is positioned in the RAM.

Is there a way to stabilize the situation even more. Again increasing the SPI baudrate is not possible since the ADS1292 does only support higher rates with external clock which is not feasible for our PCB.

Thanks,

Constantin