SPI master driver for nRF52832

[Ed]

Hello,

Question regarding using the SPI master peripheral with DMA to communicate from the nRF52832 to the ads1296 device .

In order to use this device in the mode and sampling rate I need, with the number of channels, I have to use an SPI clock frequency of 8 MHz which is supported by the nRF52832. Unfortunately, the ads1296 device (on pg 63 of datasheet, section 9.5.2.9) says that if an SPI clock frequency higher than 4 MHz is used, "a delay must be inserted so that the end of the second byte arrives 1.46us later". This basically means if I'm using 8 MHz, I have to add a delay between the OPCODE (first byte) and the second byte, and all bytes that follow do not require a delay.

So...I think I have two options :

1. Use the SPI in 4 MHz mode when I am configuring the ads1296 device, then change to 8 MHz clock when I am ready to start receiving data.

2. Modify the SPI driver to introduce a delay from the first byte to the second byte and stay using the 8 MHz clock.

Option 1 obviously seems easier but is there a way to do option 2 with minimal modifications to the SPI driver. Or does the driver provide some functionality that already allows this?

Thanks for reading - E