Power Consumption On Custom Hardware

[phipi]

I'm trying to debug a high current issue on a custom board based on the nRF52832. I'm currently loading a modified blinky app (entire main.c included below). On the nRF52DK I'm seeing around 300uA (which still seems kind of high) but on the custom board I'm seeing 8mA with the same firmware is there anything that I need to configure that could be causing this high current?

#include <stdbool.h>
#include <stdint.h>
#include "nrf_delay.h"
#include "boards.h"

/**
 * @brief Function for application main entry.
 */
int main(void)
{
	/* Toggle LEDs. */
	while (true)
	{
	  __WFE();
	  __SEV();
	  __WFE();
	}
}

[AmbystomaLabs]

As we said, there is a private way through the developer portal. Then the Nordic team are the only people who will see it. Just search on the devzone and I'm sure you will find info on it.

But it sure sounds like a short to me. With just the processor chugging along and not going to sleep it will still only draw a couple of mA. At least with the QFN you can inspect for shorts.

Occasionally people will bring the ground plane on the slug under it too close to the pins and shorts will happen under the package then.

Also you may have have not tied all the grounds together or used an insufficient number of vias both externally or under the SoC. This could cause an unstable DC/DC converter or unstable GPIO/comms. (ie, the 1.3V rail).

You could have an inappropriate sharing of a ground via on the supporting circuitry causing instability.

You may have placed the wrong, caps or inductors on the external circuitry.

Make sure to inspect all the pins under a microscope. The solder balls in the paste are only 15um or so and sometimes will not melt sit between leads on a package and are hard to see.

There could be a stray sliver of copper on the artwork. Inspect the board and any bare boards you have under a microscope.

Per the above issues, you may have a short between Vdd and the core voltages. The core running at 3v would probably work for a while but would draw a lot of current.

Finally, you could hit it with a flux pen and relflow the entire thing with a hot air rework gun. Make sure you get it to the point the nRF is floating.

Sometimes people get confused on how the GPIO with quasi open drain work. You can't hook up 1.8V gpio to 3v sources. It causes the gpio to turn on and the nRF will source power through gpio. This is only an issue of course with Vdd_nRF at 1.8V.

That's all I've got.

[run_ar]

Mypage link for private support, We can involve our RSM to get an NDA i place if needed. But do that on the internal support. Then update this case when you have identified the problem.

[phipi]

Thanks guys, that's very helpful. I will re-inspect the PCB and explore going through the Mypage to submit the schematics through there.

Otherwise Vdd_nRF is at 1.8V and we do have some external components, however they are also powered at 1.8V. What's the condition where the nRF will source power through it's gpio?

[AmbystomaLabs]

Per the spec, any external connections to gpio should be max Vdd_nRF + 0.3V or 2.1V in your case. Above this the pull up fet will turn on and the device will source via the gpio.

You should measure DEC4. Should be 1.3V not 1.8V. An easy place for a short is between Vdd, DCC and DEC4.

[run_ar]

@spizzak, did you create a mypage case?