nRF52840 SPI question

[Pranav Sanghadia]

Hi,

Can someone help me with question on SPI?

What is the difference between SPIM and SPI? They seem to have different clocks Also in the SPIM section, the frequency is said to be 32MHz in a number of places but then in one table again it is listed as 8Mbps. (which might be a typo) what do you make of this?

[Mickael]

Hi there, any update on this topic? Are the new silicon with SPIM3 enable to >8MHz released and tested yet?

[Mickael]

Other point related to this topic: could the NRF52840 QSPI interface in single SPI mode be also used as a 32MHz master SPI interface?

[ovrebekk]

Hi Mickael

We won't have a fully functional SPIM3 module until the final silicon is released next month.

The QSPI is much more specialized than the regular SPIM modules, and you won't be able to use it as a regular SPI controller unfortunately.

Best regards

[Allen Jameson]

Hi ovrebekk, this thread is very useful for me as I am developing a device that will use nrf52840 with an LCD display and am very interested in the higher-frequency SPI capability.  Can you confirm a couple points for me: 

1) Final silicon does in fact have 32MHz-capable single-mode SPI?

2) With regard to your comment above, how is QSPI different from SPIM beyond enabling 2/4 channel IO?  We plan to use this for quad-read SPI flash so I'd like to better understand your comment about it being specialized.

Thanks,

[ovrebekk]

Hi Allen

1) Yes, the SPIM3 module is available and tested in the production silicon. 

2) For all the details on the QSPI module you should read the QSPI chapter in the nRF52840 OPS. 

Essentially the QSPI module is not as generic as the other digital interfaces, as it is very much optimized to read, write and erase pages in external memory chips. It implements the command set for accessing these chips in the hardware itself, to streamline these operations and allow you to do things like Execute in Place, where code can be run directly from external memory without having to be loaded to internal memory first. 

The drawback of this is that you can't take full control over the 4 IO lines to do fully custom data exchange. There is a mechanism to send custom commands, but in this mode you are limited to 1 input line and 1 output line (like standard SPI), and the packet format is also restricted. 

In other words, the QSPI is brilliant when connecting to external memory chips that support the same command set, but not so good if you are trying to connect to something else. 

Best regards
Torbjørn