WDT interrupt not firing

[RobMeades]

I am trying to use the watchdog interrupt on an NRF52832 but am unable to get it to fire; the watchdog fires, but as far as I can tell not the preceding interrupt.  Here is some sample code to show the problem:

#include "mbed.h"
#include <SerialWireOutput.h>

// An unsigned int in an uninitialised RAM area
#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
__attribute__ ((section(".bss.uninitialised"),zero_init))
unsigned int gRetained;
#elif defined(__GNUC__)
__attribute__ ((section(".uninitialised")))
unsigned int gRetained;
#elif defined(__ICCARM__)
unsigned int gRetained @ ".uninitialised";
#endif

// Hook into the weak function to allow Serial Wire Output (because that's how my board speaks to the world)
namespace mbed {
    FileHandle *mbed_target_override_console(int)
    {
        static SerialWireOutput swo;
        return &swo;
    }
}

// Watchdog interrupt handler
void WDT_IRQHandler(void)
{
    gRetained++;
    NRF_WDT->EVENTS_TIMEOUT = 0;
}

// Entry point
int main()
{
    printf("\nStarting up and setting the watchdog timer to 5 seconds.\n");
    // Setting watchdog to 10 seconds
    // Set timeout value timeout [s] = ( CRV + 1 ) / 32768
    NRF_WDT->CRV = (5 * 32768) - 1;
    NVIC_SetPriority(WDT_IRQn, 7);
    NVIC_ClearPendingIRQ(WDT_IRQn);
    NVIC_EnableIRQ(WDT_IRQn);
    NRF_WDT->INTENSET = 1;
    NRF_WDT->TASKS_START = 1;

    printf("Retained RAM variable is %d.\n", gRetained);
    if (gRetained > 2) {
        printf("Setting retained RAM variable to 0 and resetting...\n");
        gRetained = 0;
        wait_ms(1000);
        NVIC_SystemReset();
    }

    gRetained++;
    printf("Retained RAM variable incremented to %d.\n", gRetained);

    if (gRetained < 2) {
        printf("Resetting...\n");
        wait_ms(1000);
        NVIC_SystemReset();
    } else {
        printf("Now waiting for 10 seconds so that the watchdog goes off, which should increment the retained RAM variable to %d.\n",
        gRetained + 1);
        wait_ms(10000);
    }
 
    printf("Should never get here.\n");
    while(1) {}
}

This code should show that the retained RAM variable is retained across a reset (so it really is being retained) and when the watchdog reset occurs, the retained RAM variable should be incremented by the watchdog interrupt.  However the output (compiled under ARMCC) shows that it is not:

Starting up and setting the watchdog timer to 5 seconds.
Retained RAM variable is 0.
Retained RAM variable incremented to 1.
Resetting...

Starting up and setting the watchdog timer to 5 seconds.
Retained RAM variable is 1.
Retained RAM variable incremented to 2.
Now waiting for 10 seconds so that the watchdog goes off, which should increment the retained RAM variable to 3.

Starting up and setting the watchdog timer to 5 seconds.
Retained RAM variable is 2.
...

Can anyone spot what I'm doing wrong?

Rob

[Susheel Nuguru]

I did a quick test on my desk and the interrupt was firing ok with your code. The only differenceis that i tested this in keil, exact same code

[RobMeades]

Thanks for doing that.  Are you sure your code is exactly the same?  I've just built under ARM, GCC and IAR and under no toolchain do I see the watchdog interrupt firing.  Your SoftDevice is present in the image (but not being called): could that be having an effect?

[Susheel Nuguru]

i do not have softdevice in the image, but i see that i spoke too quickly. I see that the interrupt is only being fired when i am in debug mode with a breakpoint. This is very strange. I see nothing wrong with your code at all. I believe that the bss RAM area is being properly set to no_init as i can see the variable init address to be 1 after the first reset.

[RobMeades]

How interesting.  Unfortunately it's a bit complicated for me to run my board under the debugger right now or I'd try that myself.  Any suggestions as to what I might try to workaround/explore the issue are welcomed.

[RobMeades]

A possibility that exists, but which I've been afraid to mention, is that when the watchdog  interrupt goes off the clock is still 32 kHz and so you actually only get two CPU clock cycles, at 32 kHz, to do anything.  This would hardly be enough to run one assembler instruction before the device was reset, making the watchdog interrupt feature virtually useless.  So I hope I'm wrong :-)