Capturing GPIO transitions of a 4kHz signal with BLE enabled

[dj1234]

I need to capture the time between rising transition of a GPIO pin in order to integrate a Manchester decoder of an RFID reader chip. In my particular case, the reader chip emits a waveform where the minimum time between the rising edges is ~256uS. The device I'm working on is a BLE peripheral and ideally, I'd like to run both interfaces concurrently.

This is all running on an nRF52840-DK board with FreeRTOS.

I hacked together an initial prototype where

1. I linked a PPI with GPIOE and TIMER1 where the rising edge causes the timer count to be captured
2. An IRQ on the GPIO rising edge to cache the last capture (thus getting a very accurate measurement)

This all works fine when BLE is disabled, however as soon as enable it (the device starts advertising), I appear to be missing transitions.

I'm yet to really drill down to identify how/when the transitions are missed, however I thought I might check to see if anyone can suggest a better scheme to capture the timing.

Thanks.

DJ

[haakonsh]

The HTRC110 does not appear to be using a manchester encoded protocol since it has a separate clock signal. The defining attribute of a manchester encoded signal is that it's self-clocking, where the clock signal is modulated into the signal itself. 

But this does not really change much in your case, it actually makes things a lot easier since the MCU controls the SCLK and DIN lines. Now we can use the SCLK timings to trigger SAADC sampling of the DOUT line on positive clock periods. 

See "Fig 4. Serial signaling" in https://www.nxp.com/docs/en/data-sheet/037031.pdf.


What you need to do:

1. Create a clock signal with a TIMER and GPIOTE. 
   
   
2. Create a driver for the digital input line, DIN, with manual SW GPIO toggling or maybe even use the PWM peripheral for that. I'm not 100% sure we can use the PWM for this, but if we can then you will be able to send commands to the HTRC110 without using the CPU to control the GPIO for the DIN line, as the PWM peripheral can be configured to use a pre-defined 'sequence' in RAM with EasyDMA. 
   
   
3. Setup the SAADC to sample on the SCLK's positive flank changes, based on the TIMER it runs on. 
   
   
4. Run the process I described earlier on the samples to get the data. 

[haakonsh]

I just realize that you can probably use the SPIM peripheral for this as this looks like SPI without CS/SS. If this is the case then this will be the easiest solution by far. 

It looks like you'll have to find the frequency of SCLK by trial-and-error, I suggest starting at 125kHz. 

[dj1234]

haakonsh said:

The HTRC110 does not appear to be using a manchester encoded protocol since it has a separate clock signal.

That's true as long as we're talking to the reader chip. However, once the READ_TAG command is issued, the reader chip becomes a effectively a pass-through device to the RF transponder (specs for that are here).

I just realised that the CPU uses the READ_TAG and WRITE_TAG commands to communicate with the transponder which sends it's data in Manchester encoded format.

So I don't believe that I'll be able to use the SCLK as a trigger. However, SAADS with a pure timer sampling the data as you suggested I think will do the trick. i'll give that a go.

Thank you very much for your help

[haakonsh]

Aah, I see. 

FromHT2 Transponder Family Communication Protocol, page 8:
"The first bit of the transmitted data always starts with the Modulator ON (loaded) state." 

It looks like the data signal always starts with a logical high, so you can start a TIMER based on a low-to-high GPIOTE transition, as long as you've got a weak pull-down resistor on the line. 

Also, the Manchester encoding is of the G.E Thomas variety, so you don't even need to XOR the data bits with the clock, as long as you sample in the first half-period of a symbol. 

With BIPHASE decoding you'll need to sample both half-periods of each symbol and find what pair has two identical values, representing a '1', and who's got two different values, representing a '0'. 

Anyways, this looks like a fun project, let me know if you need any more help. 

[dj1234]

Yes it is a fun project.

One more thing. I don't think I can simply rely on the GPIO to start the SAADC because, a transponder may not be in contact, in which case I think the DOUT pin will be toggling at random intervals. The Manchester sample code that I linked to earlier looks for the preamble to actually get the timing. So I think I will need an edge detection algorithm.

This is what I started doing:

1. Setup the SAADC to run continuously at 16us intervals (using the internal timer) filling a 64 sample buffer (which covers a millisecond worth of samples)
2. Run a process that looks for edges. At 16us, I have 16 samples within a 256us interval which gives me a 6% error margin which I think is acceptable.
3. Run the Manchester decoder on the processed data

My implementation assumes the following:

• The STARTED event is generated when SAADC starts filling in the supplied buffer.
  • An Interrupt is generated where I'm free to update the RESULT.PTR register.
• Once the buffer is filled, an END event is generated
  
  • The PPI restarts the SAADC with the new RESULT.PTR register value
  • By the time the END interrupt handler is invoked, the SAADC is already filling up the next buffer, I have plenty of time to process the previous buffer
  • Because the PPI has restarted the SAADC, a STARTED event is generated allowing the process to continue

But I seem to be occasionally missing some samples as the period between transitions vary a bit too much (especially while BLE is running).

Here's an extract of my implementation (C + pseudocode):

#define BUFFER_COUNT		3
#define BUFFER_SIZE			32

static nrf_saadc_value_t     adc_buf[BUFFER_COUNT][BUFFER_SIZE];
static uint8_t buffer_head;
static uint8_t buffer_tail = 1;


static void saadc_init()
{
    nrf_saadc_resolution_set(NRF_SAADC_RESOLUTION_8BIT);
    nrf_saadc_oversample_set(NRF_SAADC_OVERSAMPLE_DISABLED);

    nrf_saadc_int_disable(NRF_SAADC_INT_ALL);
    nrf_saadc_event_clear(NRF_SAADC_EVENT_END);
    nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED);
    nrf_saadc_event_clear(NRF_SAADC_EVENT_STOPPED);
    NRFX_IRQ_PRIORITY_SET(SAADC_IRQn, 6);
    NRFX_IRQ_ENABLE(SAADC_IRQn);
    nrf_saadc_int_enable(NRF_SAADC_INT_END);
    nrf_saadc_enable();
}


static void saadc_channel_init()
{
	nrf_saadc_channel_config_t channel_config = SAADC_HISPEED_CHANNEL_CONFIG_SE(NRF_SAADC_INPUT_AIN0);
    nrf_saadc_channel_init(0, &channel_config);
}


static void saadc_buffer_init()
{
    nrf_saadc_int_enable(NRF_SAADC_INT_STARTED | NRF_SAADC_INT_END);
	nrf_saadc_buffer_init(adc_buf[0], BUFFER_SIZE);
	nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED);
	nrf_saadc_task_trigger(NRF_SAADC_TASK_START);
}


static void ppi_saadc_init()
{
	NRF_PPI->CH[0].EEP = (uint32_t)&NRF_SAADC->EVENTS_END;
	NRF_PPI->CH[0].TEP = (uint32_t)&NRF_SAADC->TASKS_SAMPLE;
	NRF_PPI->FORK[0].TEP = (uint32_t)&NRF_SAADC->TASKS_START;
    nrf_ppi_channel_enable(NRF_PPI_CHANNEL0);
}


void process_thread()
{
    uint8_t buffer_index;
    nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE);
    
    for(;;)
    {
        // Wait for END notification
        AWAIT_BUFFER_READY(&buffer_index);
        ; // process data saadc data here
    }
}


main()
{
    saadc_init();
    saadc_channel_init();
    nrf_saadc_continuous_mode_enable(256);
    saadc_buffer_init();

	ppi_saadc_init();
	
	process_thread();
}


void nrfx_saadc_irq_handler(void)
{
	BaseType_t xHigherPriorityTaskWoken = pdFALSE;

	// This is a higher priority event. Handle END first and if necessary also handle the STARTED
	if (nrf_saadc_event_check(NRF_SAADC_EVENT_END))
	{
		nrf_saadc_event_clear(NRF_SAADC_EVENT_END);
		
		// Sampling complete / buffer full event. The PPI has already initiated next
		// sampling already started on the next buffer so we have no problems with interrupt latency.
		// Simply notify the running thread that a buffer is ready to be processed. The thread needs
		// to process this buffer before the next one buffer is filled.

		NOTIFY_BUFFER_READY(buffer_head)
        buffer_head = (buffer_head + 1) % BUFFER_COUNT;
	}

	// End of conversion events need to be lower priority compared 
	if (nrf_saadc_event_check(NRF_SAADC_EVENT_STARTED))
	{
		// Yes. Prepare the next buffer that the data will be written to
		nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED);

		nrf_saadc_buffer_pointer_set(adc_buf[buffer_tail]);
        buffer_tail = (buffer_tail + 1) % BUFFER_COUNT;
	}
}

Do you see anything obvious that would account for it?