Extended corruption occurs if DMA transfers for commands and data originate from the same RAM bank.
It is avoided if transfer of command bytes and transfer of data bytes originate from separate banks.
The sequence that causes corruption is:
• DMA transfer of command bytes (D/CX is low) from bank 1
• DMA transfer of data bytes (D/CX is high) from bank 1
The sequence that resolves the anomaly is:
• DMA transfer of command bytes (D/CX is low) from bank 1
• DMA transfer of data bytes (D/CX is high) from bank 2
The impact expands the suggested workaround described in the Errata. The workaround requires reserving 2 banks exclusively for SPIM3 DMA transfer (1 for command bytes, 1 for data bytes).