parameters to modify to set properly the rx transceiver

[paolo lucantonio]

hi, i'd like to make communicate 2 different nrf24l01+ without the enhanced shockburst if possible, i'm using arduino to control the tx and fpga to control the rx; i'd like to know which register i should modify to allow the communication (i'll insert the code below) and in particular i'd like to know the way i must configure the rx address with the respect to the tx one since i can't understand much in the datasheet.

  /***************************/
    //disable auto ack- not used
    u8 raaREG = 0x01;
    u8 waaREG = 0x21;
    u8 disableAA = 0x00;
    u8 *disableAAp = &disableAA;
    u8 *raaREGp = &raaREG;
    u8 *waaREGp = &waaREG;
    Xil_Out8(IRQ_BASE_ADDR,0);
    XSpiPs_PolledTransfer(myinstanceptr,waaREGp,NULL,1);
    XSpiPs_PolledTransfer(myinstanceptr,disableAAp,NULL,1);
    Xil_Out8(IRQ_BASE_ADDR,1);

    Xil_Out8(IRQ_BASE_ADDR,0);
    XSpiPs_PolledTransfer(myinstanceptr,raaREGp,dummyp,1);
    XSpiPs_PolledTransfer(myinstanceptr,dummyp,dummyp,1);
    Xil_Out8(IRQ_BASE_ADDR,1);
    /***************************/
	//frequency setup
	u8 freq = 0x39;
	u8 *freqptr = &freq;
	u8 wFRREG = 0x25;
	u8 rFRREG = 0x05;
	u8 *wFRREGp = &wFRREG;
	u8 *rFRREGp = &rFRREG;

	Xil_Out8(IRQ_BASE_ADDR,0);
	XSpiPs_PolledTransfer(myinstanceptr,wFRREGp,NULL,1);
	XSpiPs_PolledTransfer(myinstanceptr,freqptr,NULL,1);
	sleep(0.1);
	Xil_Out8(IRQ_BASE_ADDR,1);

	//following reading operations are for debug
	Xil_Out8(IRQ_BASE_ADDR,0);
	XSpiPs_PolledTransfer(myinstanceptr,rFRREGp,dummyp,1);
	XSpiPs_PolledTransfer(myinstanceptr,dummyp,dummyp,1);
	Xil_Out8(IRQ_BASE_ADDR,1);
	/***************************/

	/***************************/
	//Setting retries to 0
	u8 retry = 0x00;
	u8 *retryp= &retry;
	u8 rREGrty  = 0x04;
	u8 wREGrty = 0x24;
	u8 *rREGrtyp =&rREGrty;
	u8 *wREGrtyp = &wREGrty;

	Xil_Out8(IRQ_BASE_ADDR,0);
	XSpiPs_PolledTransfer(myinstanceptr,wREGrtyp,NULL,1);
	XSpiPs_PolledTransfer(myinstanceptr,retryp,NULL,1);
	Xil_Out8(IRQ_BASE_ADDR,1);

	Xil_Out8(IRQ_BASE_ADDR,0);
	XSpiPs_PolledTransfer(myinstanceptr,rREGrtyp,dummyp,1);
	XSpiPs_PolledTransfer(myinstanceptr,dummyp,dummyp,1);
	Xil_Out8(IRQ_BASE_ADDR,1);
	/****************************/
	/****************************/
	//data rate setup and PA level
	u8 datarate = 0x26;
	u8 *datarateptr = &datarate;
	u8 rDRREG = 0x06;
	u8 wDRREG = 0x26;
	u8 *rDRREGp = &rDRREG;
	u8 *wDRREGp = &wDRREG;

	Xil_Out8(IRQ_BASE_ADDR,0);
	XSpiPs_PolledTransfer(myinstanceptr,wDRREGp,NULL,1);
	XSpiPs_PolledTransfer(myinstanceptr,datarateptr,NULL,1);
	Xil_Out8(IRQ_BASE_ADDR,1);

	//following reading operations are for debug
	Xil_Out8(IRQ_BASE_ADDR,0);
	XSpiPs_PolledTransfer(myinstanceptr,rDRREGp,dummyp,1);
	XSpiPs_PolledTransfer(myinstanceptr,dummyp,dummyp,1);
	Xil_Out8(IRQ_BASE_ADDR,1);

	/****************************/
	/*****************/
	//setup address width
	u8 rawREG = 0x03;
	u8 wawREG = 0x23;
	u8 *rawREGp = &rawREG;
	u8 *wawREGp = &wawREG;
	u8 width = 0x03;
	u8 *widthp = &width;
	Xil_Out8(IRQ_BASE_ADDR,0);
	XSpiPs_PolledTransfer(myinstanceptr,wawREGp,NULL,1);
	XSpiPs_PolledTransfer(myinstanceptr,widthp,NULL,1);
	Xil_Out8(IRQ_BASE_ADDR,1);

	Xil_Out8(IRQ_BASE_ADDR,0);
	XSpiPs_PolledTransfer(myinstanceptr,rawREGp,dummyp,1);
	XSpiPs_PolledTransfer(myinstanceptr,dummyp,dummyp,1);
	Xil_Out8(IRQ_BASE_ADDR,1);
	/*****************/
	/***************************/
	//rx pipe setup
	/*********/
	//activate pipe 0 to receive
	u8 rxpipe = 0x01	;
	u8 *rxpipeptr = &rxpipe;
	u8 rRXREG = 0x02;  //activate pipe 0 to receive
	u8 wRXREG = 0x22;
	u8 *rRXREGp = &rRXREG;
	u8 *wRXREGp = &wRXREG;

	Xil_Out8(IRQ_BASE_ADDR,0);
	XSpiPs_PolledTransfer(myinstanceptr,wRXREGp,NULL,1);
	XSpiPs_PolledTransfer(myinstanceptr,rxpipeptr,NULL,1);
	Xil_Out8(IRQ_BASE_ADDR,1);

	Xil_Out8(IRQ_BASE_ADDR,0);
	XSpiPs_PolledTransfer(myinstanceptr,rRXREGp,dummyp,1);
	XSpiPs_PolledTransfer(myinstanceptr,dummyp,dummyp,1);
	Xil_Out8(IRQ_BASE_ADDR,1);
	/********/
/*******/
	//setting pipe width
	u8 rRXPIPE = 0x11;
	u8 wRXPIPE = 0x31;
	u8 *rRXPIPEp = &rRXPIPE;
	u8 *wRXPIPEp = &wRXPIPE;
	u8 rxpipebyte = 0x20;
	u8 *rxpipebyteptr = &rxpipebyte;
	/**********/

	Xil_Out8(IRQ_BASE_ADDR,0);
	XSpiPs_PolledTransfer(myinstanceptr,wRXPIPEp,NULL,1);
	XSpiPs_PolledTransfer(myinstanceptr,rxpipebyteptr,NULL,1);
	Xil_Out8(IRQ_BASE_ADDR,1);

	//following reading operations are for debug


	Xil_Out8(IRQ_BASE_ADDR,0);
	XSpiPs_PolledTransfer(myinstanceptr,rRXPIPEp,dummyp,1);
	XSpiPs_PolledTransfer(myinstanceptr,dummyp,dummyp,1);
	Xil_Out8(IRQ_BASE_ADDR,1);


	/***************************/

	/****************************************************************/
	    // register config setup commands
		u8 pwrup = 0x0A;
		u8 *pwrupptr = &pwrup;
		u8 primrx = 0x0B;
		u8 *primrxptr = &primrx;
		u8 rREG = 0x00;
		u8 wREG = 0x20;
		u8 *rREGp = &rREG;
		u8 *wREGp = &wREG;
		Xil_Out8(IRQ_BASE_ADDR,0);
		XSpiPs_PolledTransfer(myinstanceptr,wREGp,NULL,1);
		XSpiPs_PolledTransfer(myinstanceptr,pwrupptr,NULL,1);
		sleep(0.3);
		Xil_Out8(IRQ_BASE_ADDR,1);


		Xil_Out8(IRQ_BASE_ADDR,0);
		XSpiPs_PolledTransfer(myinstanceptr,wREGp,NULL,1);
		XSpiPs_PolledTransfer(myinstanceptr,primrxptr,NULL,1);
		sleep(0.3);
		Xil_Out8(IRQ_BASE_ADDR,1);

		//following reading operations are for debug
		Xil_Out8(IRQ_BASE_ADDR,0);
		XSpiPs_PolledTransfer(myinstanceptr,rREGp,dummyp,1);
		XSpiPs_PolledTransfer(myinstanceptr,dummyp,dummyp,1);
		Xil_Out8(IRQ_BASE_ADDR,1);
		Xil_Out8(CE_BASE_ADDR,0x01);
		sleep(0.2); //need to wait after setting nrf as receiver
 //i'm not posting the rx address commands since it does not work, p.s. the xil out of the irq base addr is the low high high low transition of the csn and the xspipspolledtransfer is the spi transfer of fpga
 // xspipspolledtransfer is defined as (spi channel, *txbuffptr, *rxbuffptr, size(it has not to be increased of 1 as the arduino function does) )
  //for each step i first overwrite the register and then i check the result so the parts of the reading (the ones with dummyp) can be ignored

[ketiljo]

You need to make sure the TX address matches the RX address, and that you're using the same frequency of course, that's it. 

[paolo lucantonio]

i understood that but i am having some troubles configuring it; assuming i assign the tx address with 0xE0E0E0E0E0 (it should be 5 bytes long as i understood from the datasheet) and i'd like to use pipe 2 to receive, should i write on pipe0 address the same address of tx since the 4 MSbyte of the rx addresses are in common and then write the last E0 on the pipe 2 one? besides, are there any restriction about the address i can use? for what i discover the addresses i am writing are just logic channel with respect to the physical RF channel so i should be able to use any address i prefere

[ketiljo]

LSB in the address can't be the same on two pipes. So it' won't work if Pipe0 is 0xE0E0E0E0E0 and pipe2 is 0xE0. Use unique bytes for the LSB.

All addresses will work, except for 0x5555... and 0xAAAA... because this is a continuation of the pre-amble. 

[paolo lucantonio]

so, in case i'd like to use the E0E0E0E0E0 i should write on pipe0 E0E0E0E0E2 for example and then E0 on pipe 2

[ketiljo]

Yes