Using nRF5340-PDK with zephyr adxl372 sensor sample project

[DBT]

I'm new to the nRF5340 and zephyr and ncs, but I have gone through the tutorial series https://devzone.nordicsemi.com/nordic/nrf-connect-sdk-guides/b/getting-started/posts/nrf-connect-sdk-tutorial 

We're developing a product that will use the SPIS peripheral on the nRF5340 and I have a few nRF5340-PDK boards

Since I haven't found any SPIS sample projects, I started with the zephyr adxl372 sensor sample project.

I wanted to get it to a point where the SPIM peripheral was working (wiggling pins as expected) then create my own sensor and change it to SPIS.

I re-mapped the SPI pins to pins on port 1.

I started by using the non-secure build, but couldn't get any SPI activity on the pins.

It looked like the chip select pin was being handled as a GPIO pin (rather than as part of the SPIM peripheral) and when I tried to manually change registers in the GPIO1 peripheral through the SES through the registers view, all the SPIM1 registers showed as 0 and I couldn't change them.

I wondered if GPIO1 was not under the application processor's control, because the NRF_P1 is missing from the peripheral domain status printed at bootup.

Peripheral Domain Status
00 NRF_P0 Non-Secure OK
01 NRF_CLOCK Non-Secure OK
02 NRF_RTC0 Non-Secure OK
03 NRF_RTC1 Non-Secure OK
04 NRF_NVMC Non-Secure OK
05 NRF_UARTE1 Non-Secure OK
06 NRF_UARTE2 Secure SKIP
07 NRF_TWIM2 Non-Secure OK
08 NRF_SPIM3 Non-Secure OK
09 NRF_TIMER0 Non-Secure OK
10 NRF_TIMER1 Non-Secure OK
11 NRF_TIMER2 Non-Secure OK
12 NRF_SAADC Non-Secure OK
13 NRF_PWM0 Non-Secure OK
14 NRF_PWM1 Non-Secure OK
15 NRF_PWM2 Non-Secure OK
16 NRF_PWM3 Non-Secure OK
17 NRF_IPC Non-Secure OK
18 NRF_VMC Non-Secure OK
19 NRF_FPU Non-Secure OK
20 NRF_EGU1 Non-Secure OK
21 NRF_EGU2 Non-Secure OK
22 NRF_DPPIC Non-Secure OK
23 NRF_GPIOTE1 Non-Secure OK
24 NRF_REGULATORS Non-Secure OK

When I choose Project > Configure nRF Connect SDK Project (in the non-secure project) it shows two options - menuconfig and spm_menuconfig

I tried the secure build, and then I saw SPI activity.

But when I try to view the configuration with Project > Configure nRF Connect SDK Project (in the secure project) it does not show me two options.  It just takes me to a config.

Q1:  Why doesn't the non-secure project work to control the SPI pins?

Q2: Why doesn't the secure project show both menuconfig and spm_menuconfig?

[Simon]

The reason it isn't working with the SPI pins you're using is that there are only 32 valid pin select option, specifically between 0 and 31.

You've chosen the values 0x28, 0x27 and 0x26 which converts to the decimal values 40, 39, and 38. Check out the file ncs\nrf\samples\other\rallare_spi\build\zephyr\include\generated\devicetree.conf after building the sample with those pins:

# SCK pin
DT_NORDIC_NRF_SPIM_40009000_SCK_PIN=38
DT_ALIAS_SPI_1_SCK_PIN=38
DT_NORDIC_NRF_SPIM_SPI_1_SCK_PIN=38
DT_INST_0_NORDIC_NRF_SPIM_SCK_PIN=38
# MOSI pin
DT_NORDIC_NRF_SPIM_40009000_MOSI_PIN=40
DT_ALIAS_SPI_1_MOSI_PIN=40
DT_NORDIC_NRF_SPIM_SPI_1_MOSI_PIN=40
DT_INST_0_NORDIC_NRF_SPIM_MOSI_PIN=40
# MISO pin
DT_NORDIC_NRF_SPIM_40009000_MISO_PIN=39
DT_ALIAS_SPI_1_MISO_PIN=39
DT_NORDIC_NRF_SPIM_SPI_1_MISO_PIN=39
DT_INST_0_NORDIC_NRF_SPIM_MISO_PIN=39

I was too quick to answer the question you asked earlier: "I don't understand why it was necessary to change the pins.  I had planned to use:". The reply provided above answers this question.

Best regards,

Simon

[DBT]

Are you saying that the rallare example only supports P0 (Port 0) pins - not P1 pins?

Or that the pin numbering for both P0 and P1 fit within 32 values?

Per my prior post, these are the pins I want to use:

CS: P1.05

SCK: P1.06

MISO: P1.07

MOSI: P1.08

I would expect (based on prior experience with the nRF52840 and with the SPI example programs that are working for me - the ones that use a secure build) for P1 pins, you use the index plus 32.

So P1.00 = 32, P1.01=33, P1.06 = 38 = 0x26, P1.07 = 39 = 0x27, P1.08 = 40 = 0x28

What numbers should I use for the pins I want to use?

[Simon]

I am really sorry for the late reply. I managed to make it work by modifying the files subsys/spm/spm.c and subsys/spm/Kconfig.

Could you try to apply the patch below to NCS v1.2.0 (nrf repo) and see if you can make it work. I was able to make it work with the P1 pins with these changes.

Fullscreen mypatch.diff Download

diff --git a/subsys/spm/Kconfig b/subsys/spm/Kconfig
index c29eadba..6c5af406 100644
--- a/subsys/spm/Kconfig
+++ b/subsys/spm/Kconfig
@@ -128,6 +128,10 @@ config SPM_NRF_P0_NS
 	bool "GPIO is Non-Secure"
 	default y
 
+config SPM_NRF_P1_NS
+	bool "GPIO 1 is Non-Secure"
+	default y
+
 config SPM_NRF_GPIOTE1_NS
 	bool "GPIOTE1 IRQ available in Non-Secure domain"
 	default y
diff --git a/subsys/spm/spm.c b/subsys/spm/spm.c
index da887cb7..42241825 100644
--- a/subsys/spm/spm.c
+++ b/subsys/spm/spm.c
@@ -300,6 +300,9 @@ static void spm_config_peripherals(void)
 #ifdef NRF_P0
 		PERIPH("NRF_P0", NRF_P0, CONFIG_SPM_NRF_P0_NS),
 #endif
+#ifdef NRF_P1
+		PERIPH("NRF_P1", NRF_P1, CONFIG_SPM_NRF_P1_NS),
+#endif
 #ifdef NRF_CLOCK
 		PERIPH("NRF_CLOCK", NRF_CLOCK, CONFIG_SPM_NRF_CLOCK_NS),
 #endif
@@ -377,6 +380,10 @@ static void spm_config_peripherals(void)
 		/* Configure GPIO pins to be Non-Secure */
 		NRF_SPU->GPIOPORT[0].PERM = 0;
 	}
+	if (IS_ENABLED(CONFIG_SPM_NRF_P1_NS)) {
+		/* Configure GPIO 1 pins to be Non-Secure */
+		NRF_SPU->GPIOPORT[1].PERM = 0;
+	}
 
 	for (size_t i = 0; i < ARRAY_SIZE(periph); i++) {
 		int err;

Regarding referencing the P1 pins by using the index plus 32, you are correct, it seems like this function will find the correct port. I have not used this approach before, so I apologize for the confusion. I am learning every day 

Best regards,

Simon

[DBT]

Thanks!

With this last piece of information, I was able to get non-secure builds working with SPI pins on port 1.

Now I'm able to get SPI working based on the adxl372 example code and the rallare example code, both secure and non-secure builds, using SPI pins on port 1.