DPPI Clock Synchronization/Jitter

Question

On the nRF52840, I know the PPI, and therefore any events/tasks, are synchronized to the 16MHz peripheral clock. Here is the quote from the documentation: 
 "On each PPI channel, the signals are synchronized to the 16 MHz clock, to avoid any internal violation of setup and hold timings. As a consequence, events that are synchronous to the 16 MHz clock will be delayed by one clock period, while other asynchronous events will be delayed by up to one 16 MHz clock period." ( Infocenter - nRF52840 PPI ) 
 But I don't see a similar specification on the analogous peripheral on the nRF5340: ( Infocenter - nRF5340 DPPI ) 
 So my question is what clock does the DPPI synchronize to? 
 For the more applicable question: If I were to setup a TIMER to measure the time between RADIO events using the DPPI, what kind of jitter can I expect between each RADIO event, and starting/stopping the timer?

Hung Bui · Accepted Answer

Hi Abram, 
 The DPPI system on the nRF53 is a little bit more complex than the PPI on the nRF52. Here the information I got from our designers: 
 One 16 MHz cycle is correct for 53-series as well, but may be higher in two situations: 
 
 When the event comes from the 32 kHz source (watchdog, rtc) and the rest of the core is inactive/sleeping 
 Events from the other core via IPC, while the receiving core is inactive/sleeping 
 
 Under those two exceptions, additional delay to start up the HF clock and regulators will come in addition. If users wants to have predictable latency, we have this constant latency mode that can be used to avoid the HFCLOCK stopping, thus ensuring a one 16 MHz clock cycle. (this is similar to nRF52). 
 This info will be included in the final Product Spec. 
 In your case the TIMER would need HFCLOCK running all the time, so setting the mode constant latency TASKS_CONSTLAT = 1 will not cause any drawback and you will have the max jitter to 1 16MHz clock cycle.