So I'm sending multiple payloads of the same width from the transmitter to a receiver and I see it sends only sends 3 times after which `TX_FULL` bit is set in the status register, and the receiver gets 3 payloads.
Note I'm using IRQ on the TX side and no IRQ on the RX side (just polling). Also, I'm not using auto-ack.
- What I don't get is how come TX fifo getting full at 3 bytes considering the tx fifo size is 32 bytes. I also checked `OBSERVE_TX` register and I see no lost bytes. Is this the reason behind not receiving more than 3 bytes?
Note that I checked `TX_FULL` in the status register as it reads `0x0f` while pushing to FIFO but as soon as I enable `CE` bit, I see the value reads `0x2E` indicating `TX_DS` is set, and IRQ is triggered.
- From what I have understood from the reference manual, you continue writing to the TX fifo but the transmission only begins after you enable the chip enable `(CE)` bit and after you enable `CE`, the data is sent in first-in-first-out order as opposed to sending each byte right away as it gets stored into the FIFO?
Following is what I did to transmit the payload: (for now I am polling despite using IRQ but eventually i'd be using callback functions to service the interrupt)
void send_payload(NRF *nrf, uint8_t *data, int len) {
power_up();
for (int i=0; i<len; i++) {
send_command(nrf, CMD_W_PAYLOAD, &data[i], len); // populate the TX fifo with data
}
// enable transmission
enable_chip_select();
// wait till IRQ handler is done servicing
while(nrf->state == NRF_TX_BUSY);
disable_chip_select();
}
int main(void) {
// ....
send_payload(&nrf, (uint8_t[]){'A','B','C','D'}, 4);
}
