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SPI master on nRF5122

I'm using nRF51822 SoC and I have a LIS3DSH accelerometer connected to the ship via SPI bus . I used the SPI master example . So i used the switch_state() function then took the rx_data and tx_data . But when debugging the Keil logic analyzer don't show me any modifacation . Does that mean that i didn't configure the spi right ? IN addiction to that , I have in the data sheet of the LIS3DSH the addressees of the registers containing the X ,Y and Z values , what shall i do to extract them ?

  • here is my code :

    main(){
    ..
    spi_master_init(SPI_MASTER_0, spi_master_0_event_handler, true); 
    spi_master_send_recv(SPI_MASTER_0, &Read_OUT_X_L_ADDR, 1, &buffer[0], 1); 
    spi_master_send_recv(SPI_MASTER_0, &Read_OUT_X_H_ADDR, 1, &buffer[1], 1); 
    spi_master_send_recv(SPI_MASTER_0, &Read_OUT_Y_L_ADDR, 1, &buffer[2], 1); 
    spi_master_send_recv(SPI_MASTER_0, &Read_OUT_Y_H_ADDR, 1, &buffer[3], 1); 
    spi_master_send_recv(SPI_MASTER_0, &Read_OUT_Z_L_ADDR, 1, &buffer[4], 1); 
    spi_master_send_recv(SPI_MASTER_0, &Read_OUT_Z_H_ADDR, 1, &buffer[5], 1);
    .. }
    
    when i add a break point after spi_master_init(); it never reaches that break point. so here the changes that i made in the spi master init
    static void spi_master_init(spi_master_hw_instance_t   spi_master_instance,
                                spi_master_event_handler_t spi_master_event_handler,
                                const bool                 lsb)
    {
        uint32_t err_code = NRF_SUCCESS;
    
        // Configure SPI master.
        spi_master_config_t spi_config ;
              spi_config.SPI_Freq= SPI_FREQUENCY_FREQUENCY_M1;
              spi_config.SPI_CONFIG_CPHA=SPI_CONFIG_CPHA_Leading ;
              spi_config.SPI_CONFIG_CPOL=SPI_CONFIG_CPOL_ActiveHigh;
              spi_config.SPI_Pin_SCK  = 8;
              spi_config.SPI_Pin_MISO = 5;
              spi_config.SPI_Pin_MOSI = 4;
              spi_config.SPI_Pin_SS   = 3;
    	  spi_config.SPI_DisableAllIRQ= 0;
    	  spi_config.SPI_PriorityIRQ=APP_IRQ_PRIORITY_LOW ;
    	spi_config.SPI_CONFIG_ORDER= SPI_CONFIG_ORDER_LsbFirst;
            
          spi_config.SPI_CONFIG_ORDER = (lsb ? SPI_CONFIG_ORDER_LsbFirst :        SPI_CONFIG_ORDER_MsbFirst);
    
        err_code = spi_master_open(spi_master_instance, &spi_config);// the prob is in this function call
        APP_ERROR_CHECK(err_code); 
    
        // Register event handler for SPI master.
        spi_master_evt_handler_reg(spi_master_instance, spi_master_event_handler);
    }
    
    and the spi_master_open () ( the same as provided in the Spi)master.c file )
    spi_master_init_hw_instance(NRF_SPI0,SPI0_TWI0_IRQn, p_spi_instance, p_spi_master_config->SPI_DisableAllIRQ);
    //A Slave select must be set as high before setting it as output,
        //because during connect it to the pin it causes glitches.
        nrf_gpio_pin_set(p_spi_master_config->SPI_Pin_SS);
        nrf_gpio_cfg_output(p_spi_master_config->SPI_Pin_SS);
        nrf_gpio_pin_set(p_spi_master_config->SPI_Pin_SS);
    
        //Configure GPIO
        nrf_gpio_cfg_output(p_spi_master_config->SPI_Pin_SCK);
        nrf_gpio_cfg_output(p_spi_master_config->SPI_Pin_MOSI);
        nrf_gpio_cfg_input(p_spi_master_config->SPI_Pin_MISO, NRF_GPIO_PIN_NOPULL);
        p_spi_instance->pin_slave_select = p_spi_master_config->SPI_Pin_SS;
    
        /* Configure SPI hardware */
        p_spi_instance->p_nrf_spi->PSELSCK  = p_spi_master_config->SPI_Pin_SCK;
        p_spi_instance->p_nrf_spi->PSELMOSI = p_spi_master_config->SPI_Pin_MOSI;
        p_spi_instance->p_nrf_spi->PSELMISO = p_spi_master_config->SPI_Pin_MISO;
    
        p_spi_instance->p_nrf_spi->FREQUENCY = p_spi_master_config->SPI_Freq;
    
        p_spi_instance->p_nrf_spi->CONFIG =
            (uint32_t)(p_spi_master_config->SPI_CONFIG_CPHA << SPI_CONFIG_CPHA_Pos) |
            (p_spi_master_config->SPI_CONFIG_CPOL << SPI_CONFIG_CPOL_Pos) |
            (p_spi_master_config->SPI_CONFIG_ORDER << SPI_CONFIG_ORDER_Pos);
    
        /* Clear waiting interrupts and events */
        p_spi_instance->p_nrf_spi->EVENTS_READY = 0;
      
    
         APP_ERROR_CHECK(sd_nvic_ClearPendingIRQ(p_spi_instance->irq_type));// while debugging it never go through this line//
        APP_ERROR_CHECK(sd_nvic_SetPriority(p_spi_instance->irq_type, p_spi_master_config->SPI_PriorityIRQ));
        ... 
    

    In my case any call of the sd_nvic functions blocks the debugging . Any idea why ?

  • The reason why it stops in APP_ERROR_CHECK, is probably because it receives an error code. That's the point of APP_ERROR_CHECK. So you can catch the error code from the previous call while debugging. So you need to see where in the spi_master_open() it fails. If you look in spi_master_open() the most obvious is that SPI_MASTER_0_ENABLE (or 1) is not defined.

    It is easier if you just post all your code as a zip file.

  • using a softdevice or not using a softdevice? If using a softdevice, have you enabled it before getting to the SPI code?

  • I'm sorry can't post my code . for code confidentiality . But i deleted the APP_ERROR_CHECK and just and it still didn't work .

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