Implementing 64-bit Epoch Time Using Timer

[WestCoastDaz]

I have an application that requires that timestamps be 64-bit epoch to the millisecond.  I'm currently using a Timer peripheral to track 1ms and increment a 64-bit counter.  I was concerned reading the value in an atomic way so I am currently disabling all interrupts when a read is performed but this seems to be pretty heavy handed. 

I saw this post https://devzone.nordicsemi.com/f/nordic-q-a/27597/extending-rtc-beyond-24-bits and it seem likes it's better just to disable the timer interrupt.

I noticed the driver API also clears the current timer value when the interrupts are enabled.  Is there a reason for this?

Is there are better way to achieve the atomic read than my current implementation?

Thanks,

[WestCoastDaz]

ovrebekk

I have some followup questions regarding the suggested implementation.  You sequence mentions disabling the timer interrupt and then enabling the timer interrupt once I have gotten the number of milliseconds using the capture.

I took this to mean disabling the CC[0] interrupt and then enable the CC[0] interrupt. The nrfx_timer.c implementation  

nrfx_timer_compare_int_enable

 calls 

nrf_timer_event_clear

 which clears the timer counter which will cause time to be lost every time the epoch is read, no?

Should I just call 

nrf_timer_int_enable

 directly instead?

Thanks,

[ovrebekk]

Hi Darren

Yes, you shouldn't have to disable the compare event itself, just temporarily disable the interrupt. 

nrf_timer_int_disable/enable should work fine, or you could disable the timer interrupt globally. 

Best regards
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