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UARTE in semi-duplex mode

Hi all,

I would like to have a semi-duplex communication link over one pin (+GND). The nRF will act as a pure slave device which responds to, and acknowledges, commands from a "master".Thus:

1. I set UARTE in RX mode.  PSEL.RXD is set to the (shared) pin.

2. A command is successfully received from the master.

3.  PSEL.RXD = 0xffffffff, PSEL.TXD s set to the (shared) pin.

4. A reply is successfully sent to the master.

5. Back to 1

The problem is that this only works two times. Then I get an "overrun" error. I've tried "EVERYTHING" to prevent this from happening; delays in various places, different sequences of pin role swithing (when the UARTE module is disabled) and trying to run  STOPRX (according to the 35.4 UARTE-Reception section of the device datasheet) in order to properly empty the RX buffer.

Any ideas ? Please help !

Cheers

Eric

  • Hi,

    Great to hear that you got it working. Unfortunately I cannot replicate your success ... yet. May I ask for some additional details:

    1. What is your initial set-up; baudrate etc. ? Do you assign NRF_UARTE0->PSEL.TXD  to the same pin at start-up or not until you have "parked" PSEL.RXD ? 

    2. Do you do the "flush RX" operation before you go into TX mode ? If yes, how does your sequence look like ?

    3. Do you set NRF_UARTE0->ENABLE = 0 before the pin swap ? (and enable it before starting to transmit) ?

    4. Have you tried the RX-TX -RX cycle a number of consecutive times without any problems ?

    The devil is in the details ...

    \Eric

  • Hello again,

    Never mind my last post. I got it working now ! As usual, when you have something that does not make any sense, there is more than one error; indeed the "parking" issue you highlighted but also another, really stupid, high level bug that also prevented multiple transactions.

    In any way; you made my day. Thanks a lot !!!

  • Good news indeed! I don't turn off the uart enable, by the way, although the datasheet says to do so before changing pins, but then the datasheet says don't share any pins between peripherals but I've never seen an issue with sharing input-function pins. Difficult to see how input-side loading might be an issue, but maybe that's the concern; I suspect it's a general rule to stop multiple peripherals driving the same output pin.

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