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Using Li battery with VBUS on nRF52840 Dongle

This is just a verification, but in the nRF52840 Dongle schematic, it looks like VBUS is is connected to VDDH (by way of VBUS_nRF, which isn't an actual pad or pin, but just VBUS after it has passed through a low-pass filter).  This being the case, is it okay to connect VBUS to a lithium (max 4.2V) battery to power the device?  I can't imagine why it wouldn't be, but it isn't specifically called out in the datasheet so I just wanted to double check.  Thanks!

  • Hi,

     

    I can forward your request, but I am not sure if or when any future revisions or designs of the Dongle is planned. Note also that a dongle is as the name implies intended for use plugged into a USB port, for battery operated applications we have other reference designs. Of course we can not have a reference design for every possible application, very specific use cases might require a custom board.

    As for the PTR clear task register, that is an IC fix and thus a larger fix. I will forward, but this will likely not be addressed before any future products.

     

    Best regards,
    Andreas

  • Hi again,

     

    Could you elaborate a bit on what you intend to do with the PTR clear task registerand why you need this, if possible by an example? We would need this to evaluate the feasibility and be confident we are addressing what you are actually missing.

     

    Best regards,
    Andreas

  • Well, I was just sort of wishing out loud, hoping you might be a genie of some sort, but if you are serious, here is the setup:

    I have a sensor that sends an interrupt when its FIFO is full. I then read the FIFO via SPIM as fast as I can (EasyDMA in List mode), then send that data via BLE to central.  Sometimes there is plenty of time to send the data via BLE before I get another interrupt, sometimes I get the interrupt while the buffer still contains data.  To me, the easiest way to solve this is to use a ring (circular) buffer, which is what I have now.  I have an array of ArrayLists (call it fifo_buff) that can hold FIFO buffer size * 4.  PPI connects TIMER0 and TIMER1 TASKS_COUNTs to SPIM EVENTS_END, and SPIM TASKS_STOP to TIMER0 EVENTS_COMPARE (TIMER0 COMPARE = FIFO buffer size and TIMER1 COMPARE = fifo_buff size).

    In a perfect world, I would have PPI also connect TIMER1 EVENTS_COMPARE to a register that reset SPIM->RXD.PTR to point to fifo_buff[0].  Instead I have to enter the TIMER1 interrupt to clear this pointer, possibly getting preempted by the SoftDevice.  If it was all in hardware, I would never have to worry about missing a read from the FIFO.

    Incidentally, this is not the first time I have had this scenario occur.  Could just be that I make devices that are too similar :-P

  • Hi,

     

    Thanks, this should be understandable. I will forward it internally.

     

    Best regards,
    Andreas

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