PTX

[JacquesBrunet]

Hello Nordic,

I try to establish communication between an ATmega328 based board an an Arduino Nano, so far without success. The goal is to improve a RF433 "Wire". 3 weeks ago, I started the project, but for 1 week, I do not make any progress. Please have a look to the attached pdf. Obviously I tried different settings, but probably not the right one! I spent time on internet, but didn't find how to fix.

Hope you can help, thank you anyway for your time.

JacquesNrf24L01+.pdf

[Kenneth]

In cases like these I always recommend to go for the minimum configuration to achieve communication, and then work from there (the below changes presume that you let all other registers use default value).

- The minimum configuration on a PRX is to set the operation mode to RX and the rx payload width of pipe0 to specific length (e.g. 3), then write PWR_UP bit to 1 (wait ~2ms), and set CE to 1.

- The minimum configuration on a PTX is write PWR_UP bit to 1 (wait ~2ms), then write the TX payload with a specific length (e.g. 3), and toggle CE to start transmission.

Best regards,
Kenneth

[JacquesBrunet]

Hello Kenneth, thank you for your answer. I am stuck on the basic PTX config for a while now. It is why I decided the send this SOS.

Here is my pretty simple assembler code :

PTXs:
		cbi		PORTD, CE			; CE pin Low
		sts		TXBuff, Centmilli	; change Payload 4th byte (4 byte long payload stored in TXBuff)
		rcall	PwrUPTX				; clr bit 0 in CONFIG reg + interrupt masks + crc 16 ; ends with 2msec delay
		rcall	AdrPipPTX			; write "2Node" in TX-ADDR ($10 reg) and RX_ADDR_P0 ($0A Reg) for ack  MSbit of LSByte first

		ldi		Temp0, $7			; STATUS
		rcall	AffReg				; oled display for monitoring
		ldi		Temp0, $17			; FIFO_STATUS
		rcall	AffReg				; oled display for monitoring

		lds		Temp1, PayLong		; 4 bytes to transmit hold in variable PayLong
		clr		Temp
		ldi		ZL, Low(TXBuff)		; Buffer where 4 bytes of payload are stored
		ldi		ZH, High(TXBuff)		
		add		ZL, Temp1
		adc		ZH, Temp			; update buffer index
		rcall	WR_TXPayload		; load FIFO

		rcall	clrStatus

		ldi		Temp0, $7			; STATUS
		rcall	AffReg				; oled display for monitoring
		ldi		Temp0, $17			; FIFO_STATUS
		rcall	AffReg				; oled display for monitoring		

		sbi		PORTD, CE			; CE pin High
		ldi		Temp, 15
		rcall	Wait2uS				; 30 µsec delay
		cbi		PORTD, CE			; CE pin Low
		ldi		Temp, 1				; wait 1 msec
		rcall	Wait				; délai transmit >130µs
		ldi		Temp0, $7			; FIFO_STATUS
		rcall	AffReg				; oled display for monitoring
		ldi		Temp0, $17			; FIFO_STATUS
		rcall	AffReg				; oled display for monitoring
loop1:

I think it fits well the recommandation, but nothing arrives at PRX 2Node address. I have also scoped the CE pin signal, which is in range too.

[JacquesBrunet]

Sorry, I sent the message too early!

Can you explain Why Max RT is asserted as soon as CE pulse returns
low ?
Is it normal to clear a flag by writing it1 ?  Usually it is 0.

Best regards

Jacques

[Kenneth]

Hi, 

JacquesBrunet said:

Can you explain Why Max RT is asserted as soon as CE pulse returns
low ?

No, I would expect there was a delay first yes. Are these genuine nRF24L01P chips bought from a Nordic distributor? 

JacquesBrunet said:

Is it normal to clear a flag by writing it1 ?  Usually it is 0.

In this case yes.

Best regards,
Kenneth 

[JacquesBrunet]

They come from an "heritage" when my father in law died! I have no idea where he bought them. It is not the chip itself, but a micro (nano?) module with 8 pins in single line.

With the simplest program you advised me, no ack, no DPL, no ART I get now STATUS = 0b00101110 which means Data sent, RX fifi empty TX fifo full. But when I monitor RPD at PRX side, I get signal < -64dBm and unfortunatly still no byte received.

I continue to pull my hairs and investigate now in how RF24 library works.

With best regards

Jacques