I have an NRF52840 connected over SPI3 to a Macronix MX25V1635F external flash part in my custom board. I save a firmware image in the external flash during FOTA. The SPI page program operations work without issue except in one instance:
1. The SPI-NOR driver checks if the previous page-program was successful by sending 0x05 (Read Status Register) and looping until the Write-Enable-Latch and Write-In-Progress bits are cleared
2. In my logic analyser trace, I see during page-program failures that a 0x03 is sent out instead of the 0x05 and when the flash responds with zero (since 0x03 initiates a read instruction) the SPI-NOR driver returns that the page-program was successful
(I assume the read operation gets called off when CS goes back high, since Macronix mention this in their datasheet)
3. Following this, the SPI driver sends out 0x06 twice for write-enable and then the next page-program is sent out with the 256 bytes that fill the page
4. The SPI-NOR driver now starts checking for the busy bits, but I see in my logic analyser trace that the Write-Enable-Latch is not set
5. Sure enough, upon reading back this page, the program has failed and all bytes are 0xFF
My questions here are:
1. Is this a known issue where the SPI3 can send a different byte than intended?
2. Is it possible to somehow add a post-write callback that I can use to check the true status of Write-Enable?
3. Should I raise an upstream issue to modify the SPI-NOR driver to verify the status of the Write-Enable-Latch to be one and the Write-In-Progress to be zero before a page-program or any other program operations are initiated?
Any help is appreciated. Thanks!
