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Failure to loadfile binary to my PCB w/ nRF51822 using nRF51 DK Debug Out

I have built a PCB that uses the nRF51822 . I am failing to load the binary onto the chip via the nRF51 DK. I can:

connect to the nRF51822 on my mac using the JLinkExe.

execute the erase command in JLink I have a small binary called LED_TEST.hex that I attempt to load. No matter how many times I run loadfile, I get the message:

Downloading file [LED_TEST.hex]...Info: J-Link: Flash download: Restarting flash programming due to program error (possibly skipped erasure of half-way erased sector). Info: J-Link: Flash download: Skip optimizations disabled for second try. Error while programming flash: Programming failed.

I'm looking for ideas on how to best debug this. I have a file that I logged the SWD traffic into. I am new to SWD traffic, and there are A LOT of records...so i'm not sure where would be the best place to focus within the SWD traffic in order to tip me off why this is happening. Here is the log file: LBL_SWD_loadfile.txt

  • I'm actually using only following pins from header P20 on nRF51 DK boards to flash external board/chip:

    • P1 (VDD nRF) to power the target.
    • P2 (VIO) short connection to P3 (SH_VTG).
    • P4 (SH_SWDIO) as SWDIO line for SWD flashing/debugging interface.
    • P5 (SH_SWDCLK) as SWDCLK line for SWD flashing/debugging interface.

    plus I use any GND from the board (e.g. PIN 6 from 2x3 header P5). It's working with nrfjprog (have you tried that or you cannot because of platform you are running?) and also with SEGGER J-Flash Lite (I don't have license for full J-Flash but I can at least connect and read in it so it should work as well). I'm wondering if also PIN reset is needed when you are using JLINK and GDB? Also nRF5x chips need special "recover" sequence when RBP (readback protection) is locked in UICR and I don't know how other tools then nrfjprog handle it. But that's not your problem I suppose...

    Good luck! Jan

  • Thank you endnode. I'm confused why you short P2 and P3...the nRF51 Development Kit User Guide 1.0 Figure 8 shows VIO as current measurement (along with VDD_nRF)... i.e.: the sh_ pins make sense to hook up to the external nRF51822. but to me not the others? Well heck, you say it works for you :-).

  • Well the "hack" is not mine and it rather looks to me that you must connect PIN 3 when you want to use SWD from built-in SEGGER J-Link over P20 header (SH_xxx connections). See this and this. However P19 is actually EXT_xxx pins which are probably treated differently in SEGGER FW on Atmel companion chip. So in the end you have 4 SWD interfaces (3 IN and 1 OUT) on the same board, great value for money;)

  • endnode - thank you for the links to the posts. They were very helpful. Much appreciated.

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