As customers reach the end of their design cycle, their attention generally falls on power optimization, especially for battery powered designs. The following are hints for achieving the lowest possible power in your design.
You mention "that single-pin GPIOTE interrupts may use more power than Port GPIOTE interrupts depending on the scenario."Do you have any idea of the order of magnitude difference for these?I'm seeing an extra ~10uA when I enable an interrupt on a pin and am trying to figure out if this is expected or not.
Certainly the SWD can be disabled, but I don't think that will have the same effect as a power cycle. The programmer can be set to do a reset via SWD ...
Any response to this?
Yes, good question.
Thanks, great post. Is there any way to disable SWD or DIF mode in software if the option of power cycling is unavailable (no access to device). ?