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SPI Master ready event not cleared

I am implementing an SPI master to communicate with an accelerometer using the SPI HAL directly. My chip is marked nrf51822QFACA11609AC. I have implemented blocking functions for reading and writing registers on the slave.

I am experiencing unexpected behavior of the ready event, namely it is not cleared on a read of the RXD register. If I clear ready events manually after reads, I am able to communicate successfully with the SPI slave.

The problem is highlighted with the code below. Two transmits are done and two respective (dummy) reads are done to clear the ready events. However, the ready bit remains set irrespective of the reads. If I uncomment the outcommented while loop, the code stays there forever, i.e. ready event is never cleared. Compiler optimizations are off and I have checked that the assignment foo=nrf_spi_rxd_get(p_spi) actually writes to foo. My compiler is GNU 4.9

void MEMS_WriteRegister(uint8_t address, uint8_t data)
{
//	uint32_t dummyCount = 0;
	nrf_gpio_pin_clear(IO_SPI_MEMS_CS_PIN);
	nrf_spi_txd_set(p_spi, 0x40 + address);		// 0x40 = address auto increment.
	// Wait for SPI operation to complete
	while (!nrf_spi_event_check(p_spi, NRF_SPI_EVENT_READY));
//	while (nrf_spi_event_check(p_spi, NRF_SPI_EVENT_READY)) {
//		dummyCount++;
		foo = nrf_spi_rxd_get(p_spi); 					// Dummy read to reset ready bit
//	}
	nrf_spi_txd_set(p_spi, data);				// Write the actual data
	while (!nrf_spi_event_check(p_spi, NRF_SPI_EVENT_READY));
	nrf_spi_rxd_get(p_spi); 					// Dummy read to reset ready bit
	nrf_gpio_pin_set(IO_SPI_MEMS_CS_PIN);
}

As said, clearing the ready event manually after each byte works, but as a need for this is not in line with documentation, the root cause needs to be understood before this can be regarded as an applicable workaround. Moreover, in order to use serialization I cannot clear the event after the read, as that could lead to lost events. I notice that someone else has experienced the same issue with the ready signal https://devzone.nordicsemi.com/question/19050/spi-master-ready-register/. Is this a known issue and/or what might be the cause? Is it safe to clear the ready flag before the read even with serialized writes and given this anomaly?

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