Reducing TWI Active Current

[Cory Mast]

Hello,

I am currently working on an ultra-low power project that requires reading an I2C accelerometer multiple times per second. After analyzing the current consumption in the design, it is clear that the TWI peripheral uses quite a bit of power. I was able to capture an oscilloscope screen capture that shows the peak current consumption at approximately 4.5mA (see attached image). It is important to note that I am measuring the voltage drop across a 10-Ohm resistor, therefore 44.89mV measured across the resistor is equal to 4.489mA through the resistor.

Is ~4.5mA expected while running the TWI module? Section 8.10 of the nRF51822 Product Specification v3.1 lists the run current for TWI at 400 kbps as 400uA, should I be seeing 400uA for the peak current during the TWI transaction instead of the ~4.5mA that I am currently measuring?

I have tried using both blocking and non-blocking mode using the TWI transaction manager but both yield similar results. The above image was captured using blocking TWI mode, but non-blocking mode only gives a marginal reduction in current consumption.

Is it possible to use the PPI/GPIOTE system to perform the TWI transaction without using the CPU? I imagine this would look something like a timer triggering the TWI transaction, and the TWI transaction completes while the CPU sleeps the entire time. I suspect that the majority of the current consumption during the TWI transaction is due to the CPU running during the transaction, would using this method allow the peak current during the TWI transaction to be reduced to the 400uA listed in the product specification?

Would it be possible to use DMA/"EasyDMA" to perform the TWI transaction and then store the result directly to RAM without involving the CPU at all? As I mentioned above, I suspect most of the current is coming from the CPU; would this approach allow for TWI transactions where the CPU sleeps for the entire time?

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Here is a description of my setup:

• nRF51822-CFAC-R
• SDK 12.2.0
• SoftDevice S130 v2.0.1
• Keil uVision v5.14
• Custom PCB design
• nRF51 powered by 1.8V from external regulator (low voltage mode)
• TWI running at 400 kbps
• TWI interrupt priority: APP_IRQ_PRIORITY_LOW

Any other advice or suggestions for reducing the TWI active current is greatly appreciated.

Thank You and Best Regards,

Cory Mast

[Stian Røed Hafskjold]

As you say, the extra current is probably coming from the CPU. The nRF51 does not have DMA, so the CPU needs to be involved after each byte transfer to read/write the bytes into the RXD/TXD register in the TWI peripheral.

[Roger Clark]

You should consider changing your custom board to use SPI if your accelerometer supports that interface, because SPI can transfer data much faster than TWI, and the time you need to run the processor can be many time lower.