Can I share SPI MISO pin for SPI peripheral and GPIO interrupt generating?

[Al Bundy]

I got some SPI flash memory that is capable of generating interrupts in order to save some program/erase time and power consumption. The only drawback is that interrupt is generated on SPI MISO pin. I wonder if I can implement interrupt driven communication with that external flash memory without the need of reconfiguring peripherals every time I want to send some command or wait for interrupt.

In other words, Can I configure pin to work as SPI MISO pin and pin interrupt source simultaneously? I imagine that I only enable and disable pin interrupt when needed without the need for reconfiguring peripherals. (nRF51822)

[run_ar]

Sounds like a strange function. But guess it might be ok as long as that is the only connected SPI slave. Anyway the SPI module will take over the pin, so it cannot be interrupt at the same time. You could possible connect it to another pin in parallell and use that as interrupt source.

[Al Bundy]

Can I set 0xFFFFFFFF in SPI MISO pin register? Will the SPI work without MISO pin being set?

[run_ar]

Yes, pretty sure that should work.