Using ADXL362 (FIFO) with NRF52

[LuckyLukas]

Hello

i am using the NRF52 EvalBoard and a ADXL362 EvalBoard. I am trying to read every 100ms the FIFO buffer of the ADXL362. Below you can see my register configuration:

• FIFO CONTROL REGISTER (0x28): 0x02
• FIFO SAMPLES REGISTER (0x29): 0x30
• FILTER CONTROL REGISTER (0x2C): 0x05
• POWER CONTROL REGISTER (0x2D): 0x02

I have used the "spi" example as a template. My goal is now to read 30*3 samples (depends on the value in the FIFO SAMPLES REGISTER) every 100ms. You could divide my task's into:

1. init the hardware
2. configurate adxl362
3. go into sleep modus (100ms)
4. read fifo buffer (30*3 samples)
5. go back to 3)

but every time i am going to read the fifo buffer i get wrong values back. Here you can see, how i am configure adxl362 and reading the fifo buffer:

// defines for initialization

#define ACC_WRITE 0x0A
#define ACC_READ 0x0B
#define ACC_FIFO 0x0D
#define SIZE_BUFFER 0x3
#define SIZE_FIFO 0x60
#define THRESH_ACT_L 0x20
#define THRESH_ACT_H 0x21
#define THRESH_INACT_L 0x23
#define THRESH_INACT_H 0x24
#define TIME_INACTIV_L 0x25
#define ACT_INACTIV_CTL 0x27
#define FIFO_CTRL 0x28
#define FIFO_SAMPLES 0x29
#define INTMAP2 0x2B
#define FILT_CTRL 0x2C
#define POWER_CTL 0x2D
#define SELF_TEST 0x2E

#define Y_AXIS_L 0x10
#define Y_AXIS_H 0x11
#define Z_AXIS_L 0x12
#define Z_AXIS_H 0x13
#define FIFO_LENGTH 0x2E

// configuration for adxl362

static uint8_t	tx_buf_L_acceleration[SIZE_BUFFER] = {ACC_READ, Y_AXIS_L, 0x00};
static uint8_t	tx_buf_H_acceleration[SIZE_BUFFER] = {ACC_READ, Y_AXIS_H, 0x00};
static uint8_t	rx_buf_y_L_acceleration[SIZE_BUFFER];
static uint8_t	rx_buf_y_H_acceleration[SIZE_BUFFER];
static uint8_t	tx_buf;
static uint8_t	rx_buf[SIZE_FIFO];
static uint8_t	acc_1_1[SIZE_BUFFER] = {ACC_WRITE, THRESH_ACT_L, 0x01};
static uint8_t	acc_1_2[SIZE_BUFFER] = {ACC_WRITE, THRESH_ACT_H, 0x00};
static uint8_t	acc_2_1[SIZE_BUFFER] = {ACC_WRITE, THRESH_INACT_L, 0x05};
static uint8_t	acc_2_2[SIZE_BUFFER] = {ACC_WRITE, THRESH_INACT_H, 0x00};
static uint8_t	acc_3_1[SIZE_BUFFER] = {ACC_WRITE, TIME_INACTIV_L, 0x1E};
static uint8_t	acc_4_1[SIZE_BUFFER] = {ACC_WRITE, ACT_INACTIV_CTL, 0x3F};
static uint8_t	acc_4_2[SIZE_BUFFER] = {ACC_WRITE, FIFO_CTRL, 0x02};
static uint8_t	acc_4_3[SIZE_BUFFER] = {ACC_WRITE, FIFO_SAMPLES, 0x30};
static uint8_t	acc_5_1[SIZE_BUFFER] = {ACC_WRITE, INTMAP2, 0x40};
static uint8_t	acc_5_2[SIZE_BUFFER] = {ACC_WRITE, FILT_CTRL, 0x05};
static uint8_t	acc_6_1[SIZE_BUFFER] = {ACC_WRITE, POWER_CTL, 0x02};

// initialization adxl362

void init_Accelerometer(void){
	
	memset(rx_buf_acc, 0, rx_buf_length);
spi_xfer_done = false;
	APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, acc_1_1, tx_buf_length, rx_buf_acc, tx_buf_length));
	while (!spi_xfer_done){__WFE();}
	
	memset(rx_buf_acc, 0, rx_buf_length);
spi_xfer_done = false;
	APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, acc_1_2, tx_buf_length, rx_buf_acc, tx_buf_length));
	while (!spi_xfer_done){__WFE();}
	
	memset(rx_buf_acc, 0, rx_buf_length);
spi_xfer_done = false;
	APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, acc_2_1, tx_buf_length, rx_buf_acc, tx_buf_length));
	while (!spi_xfer_done){__WFE();}
	
	memset(rx_buf_acc, 0, rx_buf_length);
spi_xfer_done = false;
	APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, acc_2_2, tx_buf_length, rx_buf_acc, tx_buf_length));
	while (!spi_xfer_done){__WFE();}
	
	memset(rx_buf_acc, 0, rx_buf_length);
spi_xfer_done = false;
	APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, acc_3_1, tx_buf_length, rx_buf_acc, tx_buf_length));
	while (!spi_xfer_done){__WFE();}
	
	memset(rx_buf_acc, 0, rx_buf_length);
spi_xfer_done = false;
	APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, acc_4_1, tx_buf_length, rx_buf_acc, tx_buf_length));
	while (!spi_xfer_done){__WFE();}
	
	memset(rx_buf_acc, 0, rx_buf_length);
spi_xfer_done = false;
	APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, acc_4_2, tx_buf_length, rx_buf_acc, tx_buf_length));
	while (!spi_xfer_done){__WFE();}
	
	memset(rx_buf_acc, 0, rx_buf_length);
spi_xfer_done = false;
	APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, acc_4_3, tx_buf_length, rx_buf_acc, tx_buf_length));
	while (!spi_xfer_done){__WFE();}
	
	memset(rx_buf_acc, 0, rx_buf_length);
spi_xfer_done = false;
	APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, acc_5_1, tx_buf_length, rx_buf_acc, tx_buf_length));
	while (!spi_xfer_done){__WFE();}
	
	memset(rx_buf_acc, 0, rx_buf_length);
spi_xfer_done = false;
	APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, acc_5_1, tx_buf_length, rx_buf_acc, tx_buf_length));
	while (!spi_xfer_done){__WFE();}
	
	memset(rx_buf_acc, 0, rx_buf_length);
spi_xfer_done = false;
	APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, acc_6_1, tx_buf_length, rx_buf_acc, tx_buf_length));
	while (!spi_xfer_done){__WFE();}	

}

// dummy function for reading the fifo-buffer

void read_fifo(void){
	tx_buf = ACC_FIFO;
	memset(rx_buf_acc, 0, rx_buf_length);
	spi_xfer_done = false;
	APP_ERROR_CHECK(nrf_drv_spi_transfer(&spi, &tx_buf, sizeof(tx_buf), rx_buf, sizeof(rx_buf)));
	while (!spi_xfer_done){__WFE();}
}

whenever i am going to read the fifo-buffer, is the result something like this:

what did i do wrong? why i got this strange values back from the adxl362? there are maybe much more defines in this post then i actually use. but my implementation of the configuration of the adxl362 looks like that.

[Sigurd]

if you read the STATUS REGISTER(Address: 0x0B), is the FIFO ready ?