Will GPIOTE Interrupt be generated when CPU is halted?

[koniho]

When performing flash operations, i.e. via FDS or FSTORAGE, etc. - will GPIOTE events be captured and 'queued' until the CPU is no longer halted?

Said another way:

Can I assume that a GPIO transition that occurs while CPU is halted will set the corresponding IRQ for processing later?

Thank you,

[ovrebekk]

Hi

Events and interrupts will still occur, and as soon as the flash operation is completed the interrupt should fire.

You will only be able to receive the one event though, so if you get multiple GPIO transitions during the flash operation you will still only get one interrupt.

Best regards
Torbjørn