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How does writing to SPI1->TXD affect SPIS transaction on nRF51822

wszellen gravatar image

asked 2017-10-12 08:23:58 +0100

I have a strange bug, that I do not have any good answer for.

In the software, I use either SPI1 or SPIS depending on current configuration, I have seen some rare cases where I see unexplained 0 values on the MISO line when running the mcu with SPIS activated.

Can a write to SPI1->TXD, while the SPIS is Active (SPI1->ENABLE | SPIS->ENABLE have value of 0x02) affect the output stream on MISO even if the SPI1 is not enabled?

I have found that I in some situations do write to SPI1->TXD, an error that is fixed, but I want to know if that is the reason for my issue. I belive that should be in the documentation some where if that is the case.

/Anders Zellén

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sigurdon gravatar image

answered 2017-10-17 14:52:42 +0100

updated 2017-10-26 21:33:27 +0100

Hi,

SPI1 and SPIS(SPIS1) have the same base address(instantiation ID), see reference manual page 17.

When switching from one peripheral to another sharing the same base address, one shall disable the other peripheral currently using the base address, configure the new settings, and then enable the new peripheral. So make sure that SPI1 and SPIS(SPIS1) is not enabled and used at the same time.

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Asked: 2017-10-12 08:23:58 +0100

Seen: 33 times

Last updated: okt. 12