How to disable a timer IRQ

[Dominik Hochwimmer]

Hi!

I know this might be a stupid question to you but still... I am not able to disable i.e. a timer0 cc(3) IRQ.

My way to enable it in first place:

	NRF_TIMER0->INTENSET = (TIMER_INTENSET_COMPARE3_Enabled << TIMER_INTENSET_COMPARE3_Pos);

and how i thought to disable it again:

		NRF_TIMER0->INTENCLR = (TIMER_INTENCLR_COMPARE3_Enabled << TIMER_INTENCLR_COMPARE3_Pos);

Unfortunatly this wont work.

I also played around with online (JTAG) with those 2 registers and i could not really figure out how this clear register is supposed to work :(

RGDS

[Ole Morten]

I'm not able to replicate your problem, and as far as I can see, your line works as expected. I did a quick modification to ble_app_template to test it, since it already has the setup needed to do button handling. Since the softdevice is enabled, I had to use TIMER1, but these registers should be equal on all timers.

I used the following code to set things up:

    NRF_TIMER1->CC[0] = 65535;
    NRF_TIMER1->SHORTS = TIMER_SHORTS_COMPARE0_CLEAR_Enabled << TIMER_SHORTS_COMPARE0_CLEAR_Pos;
    NRF_TIMER1->INTENSET = TIMER_INTENSET_COMPARE0_Enabled << TIMER_INTENSET_COMPARE0_Pos;
    
    NRF_TIMER1->PRESCALER = 4;
    
    err_code = sd_nvic_SetPriority(TIMER1_IRQn, APP_IRQ_PRIORITY_LOW);
    APP_ERROR_CHECK(err_code);
    
    err_code = sd_nvic_EnableIRQ(TIMER1_IRQn);
    APP_ERROR_CHECK(err_code);
    
    NRF_TIMER1->TASKS_START = 1;

and then, when pressing button 1, I do

NRF_TIMER1->INTENCLR = TIMER_INTENCLR_COMPARE0_Clear << TIMER_INTENCLR_COMPARE0_Pos;

(The _Clear value is the same as the _Enable, it's just that I think it reads better when looking at the code.)

This makes TIMER1_IRQHandler stop firing, as expected. If you still have trouble, could you please share your complete code?

In general, the -SET and -CLR pattern is described in section 9.1.2 in the Reference Manual:

Registers with multiple single-bit bit-fields may implement the “set and clear” pattern. This pattern enables firmware to set and clear individual bits in a register without having to perform a read-modify-write operation on the main register. This pattern is implemented using three consecutive addresses in the register map where the main register is followed by a dedicated SET and CLR register in that order. The SET register is used to set individual bits in the main register while the CLR register is used to clear individual bits in the main register. Writing a ‘1’ to a bit in the SET or CLR register will set or clear the same bit in the main register respectively. Reading the SET or CLR registers returns the value of the main register.

Edit: Attach the main file I used for testing.

main.c