When is the best time for Acquire the semaphore SPIS nRF51822

[Sami]

Hi Nordic,

I used PIC32 for SPI Master and nRF51822 SPIS slave. I used shortcut for my spis in nRF51822 and I need to know the right time of acquiring the semaphore and let the SPI Master to avoid reciving DEF (default) character by master. Since the shoetcut for END and Acquire event is used how can I know what time is the best time for release the semaphore and tell the master that now it can send the data?

[Stefan Birnir Sverrisson]

Hi

When the SPI master sets CSN line high, the SPI transaction is complete and the CPU on nRF51822 side must acquire the semaphore, relocate buffers, and then release the semaphore again. In order to know when the SPIS is ready to receive/transmit data, you could have an external line connected to GPIO to signal the SPI master when the semaphore is free and the SPI slave is ready to receive data.

For applications that require lowest latency of data, connecting a signal line on GPIO would be the best way to allow SPI transmission as soon as the SPIS is ready.

For applications that do not require low latency or maximum throughput, you could make an educated guess when it is safe to transfer SPI data instead of connecting an extra signal line on GPIO. 10ms should be adequate time from end of SPI transaction (CSN goes high) until start of next transaction (CSN goes low). The softdevice with second revision of the nRF51 hardware can block the CPU for up to 6ms, which can make the SPIS semaphore be granted to the CPU for 6ms before the CPU can relocate buffers. If using SPIS without a softdevice or if using the third revision of nRF51 hardware, perhaps ~5ms should be adequate time between SPI transactions. If you choose to make the educated guess instead of the signal line, you would need to implement a mechanism on the SPI master side to retransmit SPI data in the case DEF character is received on MISO line.

Update 19.12.2014 If you acquire the semaphore, and have not released it before SPI master sets CSN low, then DEF is put out on MISO. If you have however released the semaphore before SCN goes low, the next SPI transaction should be valid. The SPIS driver, which the SPIS example in the nRF51 SDK uses, sets the END-ACQUIRED shortcut so that whenever the SPI master sets the CSN line high to end the SPI transaction, CPU acquires the semaphore, relocates buffers and releases the semaphore again. That is why you can assume that the semaphore is acquired by the CPU for a few milliseconds after SPI transaction completes, and then the semaphore is free after that.

[Sami]

Thank you so much Stefan for your great response, the only thing that I can not undrestand is that according Figure 61 on nRF51 Series Reference Manual V2.1, if I Acquire the semaphore when the CSN is high the next transaction would be Ignored and I just have to wait to CSN goes low.

[Sami]

Thank you so much stefan, I did it and it seems to work, I used shortcut END-ACQUIRED but at begining of code some time Acquired event happen without END event and since I release the semaphore before END event happen and Acquired it again after END event,so that in this case it never happen and SPI just send out DEF character for ever.