How to adjust the RAM size in central and peripheral example

[Pavan kumar]

Hii all,

I'm working on a project that device will have both central and peripheral capabilities so we are using s130. I tested my application with 2 central links and 1 peripheral links so its working fine. Now I'm trying to increase the central link count when I directly do that the board is not advertising. Then i come to notice

#define CENTRAL_LINK_COUNT   4     /*< Number of central links used by the application. When changing this number remember to adjust the RAM settings*/

By reading the comment I come to notice I need to change the ram settings My concern is like how can I calculate exact value of RAM ORIGIN by using LINK_COUNT Can any one please help me in this regards (calculating the RAM start address)

Thanks in advance

[Stian Røed Hafskjold]

Please see the s130 v2 migration document included in the s130 v2 download. Under the section SoftDevice RAM usage there is a detailed explanation on how to set the correct APP_RAM_BASE

If the amount of memory assigned to the SoftDevice by *p_app_ram_base is large enough to fit the configuration, sd_ble_enable() will return NRF_SUCCESS, otherwise it will return NRF_ERROR_NO_MEM.

On return of sd_ble_enable(), *p_app_ram_base will contain the APP_RAM_BASE required for the given configuration.

So if you debug the application, and put a break point on sd_ble_enable(), you can read out the returned value to get the required ram size.

[phob]

hi, I am using nrf51822 module as follows.

As suggested by Stian, I can't debug the application with this module. I am using stlink and openocd to flash the code. Is there other way to find out.

[Turbo J]

You can debug this module with stlink and OpenOCD, at least enough to read the mentioned *p_app_ram_base value.