nRF52 ADC front end circuit

[Gabriele]

Hi, I'm developing a nRF52 application that exploits two ADC channels in single ended configuration.
VDD is 3.0V. For the signal conditioning I've chosen a driving Op Amp OPA342 followed by a RC Low Pass filter. The RC filter limits the out-of-band noise (fc=1.6kHz) and helps to attenuate the kick from the switched capacitors in the ADC’s input. I know that choosing the right amplifier and RC filter for a SAR ADC can be a challenge. Please could you provide me with either an application note or reference schematic that addresses this aspect for the nRF52832? Unfortunately the DK does not use the ADC.

Sincerely yours, Gabriele

[Anders Strand]

You might find some useful info in this blogpost.

[Carsten Wulff]

The input of the SAADC should not be that hard to drive. The input cap is a switched capacitance of up to 2.5pF (see PS for details), and even at 100kOhm source resistance it has a time constant of 0.25us, so even with 12-bit settling, which requires -ln(1/4096) > 8.32 time constants to settle, the kick back will settle in a few micro seconds.

It's generally when a SAR runs at ten's of mega hertz and up you need to worry about the kick back.

I've tested the SNDR with a 50 Ohm to ground on the PCB to match the signal source impedance, a AC coupling capacitor close to the chip, with a 10pF decoupling on the SAADC input, and setup the common mode at the input with the RESN and RESP dividers.