D:\1_2_btc_nordic_dokuman\DeviceDownload\nRF5SDK153059ac345\nRF5_SDK_15.3.0_59ac345\examples\ble_peripheral\ble_app_template\pca10040\s132\config\sdk_config.h D:\1_1_kale_kilit_yazilim\V.1.5.9_CML\V1.5.9\V1.5.9\examples\btc_ble_peripheral\BTC_Project\pca10040\s132\config\sdk_config.h
879#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED 879#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED
880#define NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED 0  880#define NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED 1 
881#endif 881#endif
952#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED 952#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED
953#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED 1  953#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED 0 
954#endif 954#endif
961#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED 961#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED
962#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED 1  962#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED 0 
963#endif 963#endif
970#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED 970#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED
971#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED 1  971#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED 0 
972#endif 972#endif
979#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED 979#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED
980#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED 1  980#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED 0 
981#endif 981#endif
988#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED 988#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED
989#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED 1  989#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED 0 
990#endif 990#endif
997#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED 997#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED
998#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED 1  998#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED 0 
999#endif 999#endif
1006#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED 1006#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED
1007#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED 1  1007#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED 0 
1008#endif 1008#endif
1015#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED 1015#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED
1016#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED 1  1016#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED 0 
1017#endif 1017#endif
1024#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED 1024#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED
1025#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED 1  1025#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED 0 
1026#endif 1026#endif
1033#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED 1033#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED
1034#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED 1  1034#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED 0 
1035#endif 1035#endif
1042#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED 1042#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED
1043#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED 1  1043#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED 0 
1044#endif 1044#endif
1060#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED 1060#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED
1061#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED 1  1061#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED 0 
1062#endif 1062#endif
1078#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED 1078#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED
1079#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED 1  1079#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED 0 
1080#endif 1080#endif
1131#ifndef NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED 1131#ifndef NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED
1132#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED 0  1132#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED 1 
1133#endif 1133#endif
1239  1239 
.  1240#ifndef NRF_CRYPTO_RNG_STATIC_MEMORY_BUFFERS_ENABLED
  1241#define NRF_CRYPTO_RNG_STATIC_MEMORY_BUFFERS_ENABLED 1
  1242#endif
  1243 
  1244#ifndef NRF_CRYPTO_RNG_AUTO_INIT_ENABLED
  1245#define NRF_CRYPTO_RNG_AUTO_INIT_ENABLED 1
  1246#endif
1240// </e> 1247// </e>
2986#ifndef NRFX_RNG_ENABLED 2993#ifndef NRFX_RNG_ENABLED
2987#define NRFX_RNG_ENABLED 0  2994#define NRFX_RNG_ENABLED 1 
2988#endif 2995#endif
4363#ifndef NRFX_UART0_ENABLED 4370#ifndef NRFX_UART0_ENABLED
4364#define NRFX_UART0_ENABLED 0  4371#define NRFX_UART0_ENABLED 1 
4365#endif 4372#endif
4480#ifndef NRFX_WDT_ENABLED 4487#ifndef NRFX_WDT_ENABLED
4481#define NRFX_WDT_ENABLED 0  4488#define NRFX_WDT_ENABLED 1 
4482#endif 4489#endif
4497#ifndef NRFX_WDT_CONFIG_RELOAD_VALUE 4504#ifndef NRFX_WDT_CONFIG_RELOAD_VALUE
4498#define NRFX_WDT_CONFIG_RELOAD_VALUE 2000 4505#define NRFX_WDT_CONFIG_RELOAD_VALUE 3000000
4499#endif 4506#endif
5107#ifndef RNG_ENABLED 5114#ifndef RNG_ENABLED
5108#define RNG_ENABLED 0  5115#define RNG_ENABLED 1 
5109#endif 5116#endif
5783#ifndef UART_EASY_DMA_SUPPORT 5790#ifndef UART_EASY_DMA_SUPPORT
5784#define UART_EASY_DMA_SUPPORT 1  5791#define UART_EASY_DMA_SUPPORT 0 
5785#endif 5792#endif
5868#ifndef WDT_ENABLED 5875#ifndef WDT_ENABLED
5869#define WDT_ENABLED 0  5876#define WDT_ENABLED 1 
5870#endif 5877#endif
5885#ifndef WDT_CONFIG_RELOAD_VALUE 5892#ifndef WDT_CONFIG_RELOAD_VALUE
5886#define WDT_CONFIG_RELOAD_VALUE 2000 5893#define WDT_CONFIG_RELOAD_VALUE 3000000
5887#endif 5894#endif
6693#ifndef MEM_MANAGER_ENABLED 6700#ifndef MEM_MANAGER_ENABLED
6694#define MEM_MANAGER_ENABLED 0  6701#define MEM_MANAGER_ENABLED 1 
6695#endif 6702#endif
6699#ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT 6706#ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT
6700#define MEMORY_MANAGER_SMALL_BLOCK_COUNT 1  6707#define MEMORY_MANAGER_SMALL_BLOCK_COUNT 128 
6701#endif 6708#endif
6713#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 6720#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT
6714#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 0  6721#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 64 
6715#endif 6722#endif
6720#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 6727#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE
6721#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 256  6728#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 64 
6722#endif 6729#endif
6727#ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT 6734#ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT
6728#define MEMORY_MANAGER_LARGE_BLOCK_COUNT 0  6735#define MEMORY_MANAGER_LARGE_BLOCK_COUNT 32 
6729#endif 6736#endif
6734#ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE 6741#ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE
6735#define MEMORY_MANAGER_LARGE_BLOCK_SIZE 256  6742#define MEMORY_MANAGER_LARGE_BLOCK_SIZE 128 
6736#endif 6743#endif
6741#ifndef MEMORY_MANAGER_XLARGE_BLOCK_COUNT 6748#ifndef MEMORY_MANAGER_XLARGE_BLOCK_COUNT
6742#define MEMORY_MANAGER_XLARGE_BLOCK_COUNT 0  6749#define MEMORY_MANAGER_XLARGE_BLOCK_COUNT 8 
6743#endif 6750#endif
6748#ifndef MEMORY_MANAGER_XLARGE_BLOCK_SIZE 6755#ifndef MEMORY_MANAGER_XLARGE_BLOCK_SIZE
6749#define MEMORY_MANAGER_XLARGE_BLOCK_SIZE 1320  6756#define MEMORY_MANAGER_XLARGE_BLOCK_SIZE 256 
6750#endif 6757#endif
6755#ifndef MEMORY_MANAGER_XXLARGE_BLOCK_COUNT 6762#ifndef MEMORY_MANAGER_XXLARGE_BLOCK_COUNT
6756#define MEMORY_MANAGER_XXLARGE_BLOCK_COUNT 0  6763#define MEMORY_MANAGER_XXLARGE_BLOCK_COUNT 4 
6757#endif 6764#endif
6762#ifndef MEMORY_MANAGER_XXLARGE_BLOCK_SIZE 6769#ifndef MEMORY_MANAGER_XXLARGE_BLOCK_SIZE
6763#define MEMORY_MANAGER_XXLARGE_BLOCK_SIZE 3444  6770#define MEMORY_MANAGER_XXLARGE_BLOCK_SIZE 2048 
6764#endif 6771#endif
7164#ifndef NRF_QUEUE_ENABLED 7171#ifndef NRF_QUEUE_ENABLED
7165#define NRF_QUEUE_ENABLED 0  7172#define NRF_QUEUE_ENABLED 1 
7166#endif 7173#endif
7434#ifndef NRF_LOG_BACKEND_RTT_ENABLED 7441#ifndef NRF_LOG_BACKEND_RTT_ENABLED
7435#define NRF_LOG_BACKEND_RTT_ENABLED 0  7442#define NRF_LOG_BACKEND_RTT_ENABLED 1 
7436#endif 7443#endif
7467#ifndef NRF_LOG_BACKEND_UART_ENABLED 7474#ifndef NRF_LOG_BACKEND_UART_ENABLED
7468#define NRF_LOG_BACKEND_UART_ENABLED 1  7475#define NRF_LOG_BACKEND_UART_ENABLED 0 
7469#endif 7476#endif
7593#ifndef NRF_LOG_DEFERRED 7600#ifndef NRF_LOG_DEFERRED
7594#define NRF_LOG_DEFERRED 1  7601#define NRF_LOG_DEFERRED 0 
7595#endif 7602#endif
10064#ifndef NRF_SDH_LOG_ENABLED 10071#ifndef NRF_SDH_LOG_ENABLED
10065#define NRF_SDH_LOG_ENABLED 1  10072#define NRF_SDH_LOG_ENABLED 0 
10066#endif 10073#endif
11757  11764 
11758// </h>   11765#ifndef APP_FIFO_ENABLED 
  11766#define APP_FIFO_ENABLED 1 
  11767#endif 
  11768 
  11769// <e> APP_UART_ENABLED - app_uart - UART driver 
11759//========================================================== 11770//==========================================================
.  11771#ifndef APP_UART_ENABLED
  11772#define APP_UART_ENABLED 1
  11773#endif
  11774 
  11775#ifndef APP_UART_DRIVER_INSTANCE
  11776#define APP_UART_DRIVER_INSTANCE 0
  11777#endif
  11778 
  11779// </e>
11760  11780 
11763  11783 
.  11784// </h>
  11785//==========================================================
11764  11786