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Is someone out there actually using the NVMC->READYNEXT register on NRF52840?

amartin

The question is in the title. I found this addition a nice optimization to be used where available (that is to this day, on NRF52840 only, according to the latest Product Specifications), but as far as I can see, the READYNEXT bit is as good as dead, contrary to the old READY flag.

But  perhaps am I missing something?

(Steps to reproduce:

* Write 1 to NVMC->CONFIG
* [ Perhaps write a word to flash. I would prefer the flag to be set before the first write, but I tried anyway. ]
* Read NVMC->READYNEXT til it is set, or you tire of it.)

Thanks!

  • 0

    Hi,

    Are you executing code from Flash or RAM here?

    If you are executing code from Flash, then "The CPU is halted if the CPU executes code from the flash while the NVMC is writing to the flash." This means by the time you try to read the READYNEXT register the previous Flash operation is already completed (READY != busy) and the READYNEXT is not set.

    I expect you will need to run your code from RAM in this case, since it's only then the CPU can still run while a flash operation is ongoing, and you can then also use the READYNEXT bit to buffer the next Flash operation (READY = busy).

    Best regards,
    Kenneth

  • 0 in reply to Kenneth

    Hello Kenneth,

      My flash writing function is actually stored in flash, but I currently don't disable interrupts around the actual write operation, so it may be that the CPU is stalled nevertheless.

      Are you implying that the READYNEXT flag is cleared when READY is set? It seems to me that wouldn't follow the semantics of "NVMC cannot accept any write operation". Also, this isn't written anywhere. Generally speaking, though NRF chips are smart in their design, and the documentation clean and "smart" too, it may be too smart in that it often relies on many implicits, and the writers and readers of the documentation don't always have the same notion of "obvious". In my humble opinion, a higher level of detail wouldn't hurt.

  • 0 in reply to amartin

    Also, I had tried setting a watchpoint on the register, and it didn't yield during writes.

  • 0 in reply to Kenneth

    Well, I have tried disabling all interrupts around the write / check sequence, and no effect. Back to my question: has somebody actually seen this feature work?

  • 0 in reply to amartin

    Don't see why interrupts would make any difference anyway, the CPU is halted means the CPU is halted. Why don't you try the one thing which ought to work which is running  the code from RAM instead of flash so the CPU doesn't halt. Then  if READYNEXT gets set before READY, you'll see it That will also let you work out whether READYNEXT is cleared again when READY itself sets. No tests with code running from FLASH are going to tell you anything as you are guaranteed not to retire a single instruction before the entire flash write is finished. 

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