RTC CC register

[Konrad Traczyk]

Hi, I've got a pretty basic question, but I haven't found a satisfying answer for it. It is obvious, that the CC registers are 32 bit wide, but because the RTC Counter is only 24bit, the same bitwidth is used for CC. The question is:

What happens if we will do something like that:

uint32_t time_offset = 0x01000000;
NRF_RTC1->CC[0] = NRF_RTC1->COUNTER + time_offset;

Can this code cause a "freeze" condition for RTC, when the not available 8bits of CC register are set (the rest bits equal to 0) and the Compare Event never triggers?

Do I have to check the overflow condition for CC reg each time I change the CC register value?

And the second question: Does transition from 0xFFFFFF to 0x000000 cause the Compare Event when the CC register was earlier set to 0?

[RK]

I don't know what you mean by a 'freeze' condition, but the comparator just ignores everything apart from the lowest 24 bits and compares based on those. So your code would be treated equivalently to

NRF_RTC1->CC[0] = ( NRF_RTC1->COUNTER + time_offset ) & 0xFFFFFF;

yes wraparound count to zero triggers the compare. Clearing to zero doesn't.

[Konrad Traczyk]

Yep, that's correct answer. Finally I have the hardware and I've made some tests.