NFC impedance interface

[Rohit]

Hei, We would be using nrf52 chip in a very miniature device that should have both BLE and NFC capability. NFC is needed for just as a tag. Thus, nrf52 is a good option. I have a doubt regarding the NFC impedance interface: According to infocenter.nordicsemi.com/ (Figure 7. NFCT antenna recommendations), two shunt capacitors are required to tune the NFC coil to 13.56 MHz. However, the resistance between the NFC1 and NFC2 varies depending upon the swing voltage and I guess it is in the range of (40 Ohm to 1 kOhm). Usually, for other standard chip (e.g. NXP) this is fixed at 80 Ohm and hence matching network can be designed assuming 80 ohm between NFC1 and NFC2 pin for the NFC antenna so that it resonates at 13.56 MHz. So, my doubt is what would be the value of this resistance between NFC1 and NFC2 for which matching network can be designed? This for sure won't just require two shunt capacitors for tuning to 13.56 MHz but rather some series capacitors as well. Please clarify this doubt. Thank you.

[Einar Thorsrud]

The NFC antenna can be viewed as a parallel resonant tank. At 13.56 MHz we would like the antenna to have its parallel resonant frequency, and this is adjusted by the capacitors to ground. The Q value/ parallel resistance of the antenna is internally adjusted automatically to get optimum voltage swing for NFC operation. The two capacitors are sufficient to position the parallel resonance for the antenna.

[Rohit]

Thanks Einar for your the explanation. A follow-up question. What would be better approach: To design the NFC coil and equivalent circuit (with shunt capacitors) in such a way that there is large variation in parallel resistance (that includes Rin and R_ant) to get optimum voltage swing or small variation in parallel resistance to get optimum voltage swing, so that power consumption is minimized.